/***************************************************************************
 *     Copyright (c) 1999-2005, Broadcom Corporation
 *     All Rights Reserved
 *     Confidential Property of Broadcom Corporation
 *
 *
 * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
 * AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
 * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
 *
 * $brcm_Workfile: $
 * $brcm_Revision: $
 * $brcm_Date: $
 *
 * Module Description:
 *                     DO NOT EDIT THIS FILE DIRECTLY
 *
 * This module was generated magically with RDB from a source description
 * file. You must edit the source file for changes to be made to this file.
 *
 *
 * Date:           Generated on         Mon Mar 28 16:48:41 2005
 *                 MD5 Checksum         ba913b07d554347688609e8e66f4943f
 *
 * Compiled with:  RDB Utility          combo_header.pl
 *                 RDB Parser           3.0
 *                 unknown              unknown
 *                 Perl Interpreter     5.006
 *                 Operating System     solaris
 *
 * Spec Versions:  BG                   01
 *                 BVN_MFD              1
 *                 CAP                  1
 *                 DSP_CTRL             03
 *                 IN656                1
 *                 ITFP                 03
 *                 LBG                  1
 *                 NET                  1
 *                 SCL                  1
 *                 VBI_DEC              03
 *                 VD_TOP               5
 *                 VIDEO_DEC            03
 *                 VIP_CTRL             03
 *                 VIP_L2               03
 *                 VPP                  03
 *
 * RDB Files:  /projects/BCM7043/A0/work/gelias/bcm7043_a0/design/chip/rdb/bcm7043_a0.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vip_tops/rdb/vip_top_blockdef.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/cap/rdb/bvn_cap.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/mfd/rdb/bvn_mfd.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/scl/rdb/bvn_scl.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vpp/rdb/vpp.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/video_decoder/rdb/video_decoder_top.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/video_decoder/rdb/vd_major_revid.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/video_decoder/rdb/vd_minor_revid.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/656_dec/rdb/in656.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/656_dec/rdb/in656_revid.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/l2/rdb/vip_intr_ctrl2.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vnet/rdb/bvn_net.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/lbg/rdb/vip_lbg.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vbi_dec/rdb/vib_top.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vbi_dec/rdb/video_dec.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vbi_dec/rdb/vbi_dec.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/itfp/rdb/itfp.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bvn/common/rdb/bvb_lite_general.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/vip_tops/rdb/vip_ctrl.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bsm/rdb/bg_top.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/bsm/rdb/bg_ctrl.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/dsp/rdb/dsp_top.rdb
 *             /projects/BCM7043/A0/snapshot/bcm7043_a0/design/dsp/rdb/dsp_ctrl.rdb
 *
 * Revision History:
 *
 * $brcm_Log: $
 *
 ***************************************************************************/

#ifndef BCM7043_A0_BG_DCTRAM_H__
#define BCM7043_A0_BG_DCTRAM_H__

/***************************************************************************
 *BG_DCTRAM - BG DCT memory
 ***************************************************************************/
#define BG_DCTRAM_dctram0                        0x005f3000 /* DCT Memory */
#define BG_DCTRAM_dctram1                        0x005f3004 /* DCT Memory */
#define BG_DCTRAM_dctram2                        0x005f3008 /* DCT Memory */
#define BG_DCTRAM_dctram3                        0x005f300c /* DCT Memory */
#define BG_DCTRAM_dctram4                        0x005f3010 /* DCT Memory */
#define BG_DCTRAM_dctram5                        0x005f3014 /* DCT Memory */
#define BG_DCTRAM_dctram6                        0x005f3018 /* DCT Memory */
#define BG_DCTRAM_dctram7                        0x005f301c /* DCT Memory */
#define BG_DCTRAM_dctram8                        0x005f3020 /* DCT Memory */
#define BG_DCTRAM_dctram9                        0x005f3024 /* DCT Memory */
#define BG_DCTRAM_dctram10                       0x005f3028 /* DCT Memory */
#define BG_DCTRAM_dctram11                       0x005f302c /* DCT Memory */
#define BG_DCTRAM_dctram12                       0x005f3030 /* DCT Memory */
#define BG_DCTRAM_dctram13                       0x005f3034 /* DCT Memory */
#define BG_DCTRAM_dctram14                       0x005f3038 /* DCT Memory */
#define BG_DCTRAM_dctram15                       0x005f303c /* DCT Memory */
#define BG_DCTRAM_dctram16                       0x005f3040 /* DCT Memory */
#define BG_DCTRAM_dctram17                       0x005f3044 /* DCT Memory */
#define BG_DCTRAM_dctram18                       0x005f3048 /* DCT Memory */
#define BG_DCTRAM_dctram19                       0x005f304c /* DCT Memory */
#define BG_DCTRAM_dctram20                       0x005f3050 /* DCT Memory */
#define BG_DCTRAM_dctram21                       0x005f3054 /* DCT Memory */
#define BG_DCTRAM_dctram22                       0x005f3058 /* DCT Memory */
#define BG_DCTRAM_dctram23                       0x005f305c /* DCT Memory */
#define BG_DCTRAM_dctram24                       0x005f3060 /* DCT Memory */
#define BG_DCTRAM_dctram25                       0x005f3064 /* DCT Memory */
#define BG_DCTRAM_dctram26                       0x005f3068 /* DCT Memory */
#define BG_DCTRAM_dctram27                       0x005f306c /* DCT Memory */
#define BG_DCTRAM_dctram28                       0x005f3070 /* DCT Memory */
#define BG_DCTRAM_dctram29                       0x005f3074 /* DCT Memory */
#define BG_DCTRAM_dctram30                       0x005f3078 /* DCT Memory */
#define BG_DCTRAM_dctram31                       0x005f307c /* DCT Memory */
#define BG_DCTRAM_dctram32                       0x005f3080 /* DCT Memory */
#define BG_DCTRAM_dctram33                       0x005f3084 /* DCT Memory */
#define BG_DCTRAM_dctram34                       0x005f3088 /* DCT Memory */
#define BG_DCTRAM_dctram35                       0x005f308c /* DCT Memory */
#define BG_DCTRAM_dctram36                       0x005f3090 /* DCT Memory */
#define BG_DCTRAM_dctram37                       0x005f3094 /* DCT Memory */
#define BG_DCTRAM_dctram38                       0x005f3098 /* DCT Memory */
#define BG_DCTRAM_dctram39                       0x005f309c /* DCT Memory */
#define BG_DCTRAM_dctram40                       0x005f30a0 /* DCT Memory */
#define BG_DCTRAM_dctram41                       0x005f30a4 /* DCT Memory */
#define BG_DCTRAM_dctram42                       0x005f30a8 /* DCT Memory */
#define BG_DCTRAM_dctram43                       0x005f30ac /* DCT Memory */
#define BG_DCTRAM_dctram44                       0x005f30b0 /* DCT Memory */
#define BG_DCTRAM_dctram45                       0x005f30b4 /* DCT Memory */
#define BG_DCTRAM_dctram46                       0x005f30b8 /* DCT Memory */
#define BG_DCTRAM_dctram47                       0x005f30bc /* DCT Memory */
#define BG_DCTRAM_dctram48                       0x005f30c0 /* DCT Memory */
#define BG_DCTRAM_dctram49                       0x005f30c4 /* DCT Memory */
#define BG_DCTRAM_dctram50                       0x005f30c8 /* DCT Memory */
#define BG_DCTRAM_dctram51                       0x005f30cc /* DCT Memory */
#define BG_DCTRAM_dctram52                       0x005f30d0 /* DCT Memory */
#define BG_DCTRAM_dctram53                       0x005f30d4 /* DCT Memory */
#define BG_DCTRAM_dctram54                       0x005f30d8 /* DCT Memory */
#define BG_DCTRAM_dctram55                       0x005f30dc /* DCT Memory */
#define BG_DCTRAM_dctram56                       0x005f30e0 /* DCT Memory */
#define BG_DCTRAM_dctram57                       0x005f30e4 /* DCT Memory */
#define BG_DCTRAM_dctram58                       0x005f30e8 /* DCT Memory */
#define BG_DCTRAM_dctram59                       0x005f30ec /* DCT Memory */
#define BG_DCTRAM_dctram60                       0x005f30f0 /* DCT Memory */
#define BG_DCTRAM_dctram61                       0x005f30f4 /* DCT Memory */
#define BG_DCTRAM_dctram62                       0x005f30f8 /* DCT Memory */
#define BG_DCTRAM_dctram63                       0x005f30fc /* DCT Memory */
#define BG_DCTRAM_dctram64                       0x005f3100 /* DCT Memory */
#define BG_DCTRAM_dctram65                       0x005f3104 /* DCT Memory */
#define BG_DCTRAM_dctram66                       0x005f3108 /* DCT Memory */
#define BG_DCTRAM_dctram67                       0x005f310c /* DCT Memory */
#define BG_DCTRAM_dctram68                       0x005f3110 /* DCT Memory */
#define BG_DCTRAM_dctram69                       0x005f3114 /* DCT Memory */
#define BG_DCTRAM_dctram70                       0x005f3118 /* DCT Memory */
#define BG_DCTRAM_dctram71                       0x005f311c /* DCT Memory */
#define BG_DCTRAM_dctram72                       0x005f3120 /* DCT Memory */
#define BG_DCTRAM_dctram73                       0x005f3124 /* DCT Memory */
#define BG_DCTRAM_dctram74                       0x005f3128 /* DCT Memory */
#define BG_DCTRAM_dctram75                       0x005f312c /* DCT Memory */
#define BG_DCTRAM_dctram76                       0x005f3130 /* DCT Memory */
#define BG_DCTRAM_dctram77                       0x005f3134 /* DCT Memory */
#define BG_DCTRAM_dctram78                       0x005f3138 /* DCT Memory */
#define BG_DCTRAM_dctram79                       0x005f313c /* DCT Memory */
#define BG_DCTRAM_dctram80                       0x005f3140 /* DCT Memory */
#define BG_DCTRAM_dctram81                       0x005f3144 /* DCT Memory */
#define BG_DCTRAM_dctram82                       0x005f3148 /* DCT Memory */
#define BG_DCTRAM_dctram83                       0x005f314c /* DCT Memory */
#define BG_DCTRAM_dctram84                       0x005f3150 /* DCT Memory */
#define BG_DCTRAM_dctram85                       0x005f3154 /* DCT Memory */
#define BG_DCTRAM_dctram86                       0x005f3158 /* DCT Memory */
#define BG_DCTRAM_dctram87                       0x005f315c /* DCT Memory */
#define BG_DCTRAM_dctram88                       0x005f3160 /* DCT Memory */
#define BG_DCTRAM_dctram89                       0x005f3164 /* DCT Memory */
#define BG_DCTRAM_dctram90                       0x005f3168 /* DCT Memory */
#define BG_DCTRAM_dctram91                       0x005f316c /* DCT Memory */
#define BG_DCTRAM_dctram92                       0x005f3170 /* DCT Memory */
#define BG_DCTRAM_dctram93                       0x005f3174 /* DCT Memory */
#define BG_DCTRAM_dctram94                       0x005f3178 /* DCT Memory */
#define BG_DCTRAM_dctram95                       0x005f317c /* DCT Memory */
#define BG_DCTRAM_dctram96                       0x005f3180 /* DCT Memory */
#define BG_DCTRAM_dctram97                       0x005f3184 /* DCT Memory */
#define BG_DCTRAM_dctram98                       0x005f3188 /* DCT Memory */
#define BG_DCTRAM_dctram99                       0x005f318c /* DCT Memory */
#define BG_DCTRAM_dctram100                      0x005f3190 /* DCT Memory */
#define BG_DCTRAM_dctram101                      0x005f3194 /* DCT Memory */
#define BG_DCTRAM_dctram102                      0x005f3198 /* DCT Memory */
#define BG_DCTRAM_dctram103                      0x005f319c /* DCT Memory */
#define BG_DCTRAM_dctram104                      0x005f31a0 /* DCT Memory */
#define BG_DCTRAM_dctram105                      0x005f31a4 /* DCT Memory */
#define BG_DCTRAM_dctram106                      0x005f31a8 /* DCT Memory */
#define BG_DCTRAM_dctram107                      0x005f31ac /* DCT Memory */
#define BG_DCTRAM_dctram108                      0x005f31b0 /* DCT Memory */
#define BG_DCTRAM_dctram109                      0x005f31b4 /* DCT Memory */
#define BG_DCTRAM_dctram110                      0x005f31b8 /* DCT Memory */
#define BG_DCTRAM_dctram111                      0x005f31bc /* DCT Memory */
#define BG_DCTRAM_dctram112                      0x005f31c0 /* DCT Memory */
#define BG_DCTRAM_dctram113                      0x005f31c4 /* DCT Memory */
#define BG_DCTRAM_dctram114                      0x005f31c8 /* DCT Memory */
#define BG_DCTRAM_dctram115                      0x005f31cc /* DCT Memory */
#define BG_DCTRAM_dctram116                      0x005f31d0 /* DCT Memory */
#define BG_DCTRAM_dctram117                      0x005f31d4 /* DCT Memory */
#define BG_DCTRAM_dctram118                      0x005f31d8 /* DCT Memory */
#define BG_DCTRAM_dctram119                      0x005f31dc /* DCT Memory */
#define BG_DCTRAM_dctram120                      0x005f31e0 /* DCT Memory */
#define BG_DCTRAM_dctram121                      0x005f31e4 /* DCT Memory */
#define BG_DCTRAM_dctram122                      0x005f31e8 /* DCT Memory */
#define BG_DCTRAM_dctram123                      0x005f31ec /* DCT Memory */
#define BG_DCTRAM_dctram124                      0x005f31f0 /* DCT Memory */
#define BG_DCTRAM_dctram125                      0x005f31f4 /* DCT Memory */
#define BG_DCTRAM_dctram126                      0x005f31f8 /* DCT Memory */
#define BG_DCTRAM_dctram127                      0x005f31fc /* DCT Memory */
#define BG_DCTRAM_dctram128                      0x005f3200 /* DCT Memory */
#define BG_DCTRAM_dctram129                      0x005f3204 /* DCT Memory */
#define BG_DCTRAM_dctram130                      0x005f3208 /* DCT Memory */
#define BG_DCTRAM_dctram131                      0x005f320c /* DCT Memory */
#define BG_DCTRAM_dctram132                      0x005f3210 /* DCT Memory */
#define BG_DCTRAM_dctram133                      0x005f3214 /* DCT Memory */
#define BG_DCTRAM_dctram134                      0x005f3218 /* DCT Memory */
#define BG_DCTRAM_dctram135                      0x005f321c /* DCT Memory */
#define BG_DCTRAM_dctram136                      0x005f3220 /* DCT Memory */
#define BG_DCTRAM_dctram137                      0x005f3224 /* DCT Memory */
#define BG_DCTRAM_dctram138                      0x005f3228 /* DCT Memory */
#define BG_DCTRAM_dctram139                      0x005f322c /* DCT Memory */
#define BG_DCTRAM_dctram140                      0x005f3230 /* DCT Memory */
#define BG_DCTRAM_dctram141                      0x005f3234 /* DCT Memory */
#define BG_DCTRAM_dctram142                      0x005f3238 /* DCT Memory */
#define BG_DCTRAM_dctram143                      0x005f323c /* DCT Memory */
#define BG_DCTRAM_dctram144                      0x005f3240 /* DCT Memory */
#define BG_DCTRAM_dctram145                      0x005f3244 /* DCT Memory */
#define BG_DCTRAM_dctram146                      0x005f3248 /* DCT Memory */
#define BG_DCTRAM_dctram147                      0x005f324c /* DCT Memory */
#define BG_DCTRAM_dctram148                      0x005f3250 /* DCT Memory */
#define BG_DCTRAM_dctram149                      0x005f3254 /* DCT Memory */
#define BG_DCTRAM_dctram150                      0x005f3258 /* DCT Memory */
#define BG_DCTRAM_dctram151                      0x005f325c /* DCT Memory */
#define BG_DCTRAM_dctram152                      0x005f3260 /* DCT Memory */
#define BG_DCTRAM_dctram153                      0x005f3264 /* DCT Memory */
#define BG_DCTRAM_dctram154                      0x005f3268 /* DCT Memory */
#define BG_DCTRAM_dctram155                      0x005f326c /* DCT Memory */
#define BG_DCTRAM_dctram156                      0x005f3270 /* DCT Memory */
#define BG_DCTRAM_dctram157                      0x005f3274 /* DCT Memory */
#define BG_DCTRAM_dctram158                      0x005f3278 /* DCT Memory */
#define BG_DCTRAM_dctram159                      0x005f327c /* DCT Memory */
#define BG_DCTRAM_dctram160                      0x005f3280 /* DCT Memory */
#define BG_DCTRAM_dctram161                      0x005f3284 /* DCT Memory */
#define BG_DCTRAM_dctram162                      0x005f3288 /* DCT Memory */
#define BG_DCTRAM_dctram163                      0x005f328c /* DCT Memory */
#define BG_DCTRAM_dctram164                      0x005f3290 /* DCT Memory */
#define BG_DCTRAM_dctram165                      0x005f3294 /* DCT Memory */
#define BG_DCTRAM_dctram166                      0x005f3298 /* DCT Memory */
#define BG_DCTRAM_dctram167                      0x005f329c /* DCT Memory */
#define BG_DCTRAM_dctram168                      0x005f32a0 /* DCT Memory */
#define BG_DCTRAM_dctram169                      0x005f32a4 /* DCT Memory */
#define BG_DCTRAM_dctram170                      0x005f32a8 /* DCT Memory */
#define BG_DCTRAM_dctram171                      0x005f32ac /* DCT Memory */
#define BG_DCTRAM_dctram172                      0x005f32b0 /* DCT Memory */
#define BG_DCTRAM_dctram173                      0x005f32b4 /* DCT Memory */
#define BG_DCTRAM_dctram174                      0x005f32b8 /* DCT Memory */
#define BG_DCTRAM_dctram175                      0x005f32bc /* DCT Memory */
#define BG_DCTRAM_dctram176                      0x005f32c0 /* DCT Memory */
#define BG_DCTRAM_dctram177                      0x005f32c4 /* DCT Memory */
#define BG_DCTRAM_dctram178                      0x005f32c8 /* DCT Memory */
#define BG_DCTRAM_dctram179                      0x005f32cc /* DCT Memory */
#define BG_DCTRAM_dctram180                      0x005f32d0 /* DCT Memory */
#define BG_DCTRAM_dctram181                      0x005f32d4 /* DCT Memory */
#define BG_DCTRAM_dctram182                      0x005f32d8 /* DCT Memory */
#define BG_DCTRAM_dctram183                      0x005f32dc /* DCT Memory */
#define BG_DCTRAM_dctram184                      0x005f32e0 /* DCT Memory */
#define BG_DCTRAM_dctram185                      0x005f32e4 /* DCT Memory */
#define BG_DCTRAM_dctram186                      0x005f32e8 /* DCT Memory */
#define BG_DCTRAM_dctram187                      0x005f32ec /* DCT Memory */
#define BG_DCTRAM_dctram188                      0x005f32f0 /* DCT Memory */
#define BG_DCTRAM_dctram189                      0x005f32f4 /* DCT Memory */
#define BG_DCTRAM_dctram190                      0x005f32f8 /* DCT Memory */
#define BG_DCTRAM_dctram191                      0x005f32fc /* DCT Memory */
#define BG_DCTRAM_dctram192                      0x005f3300 /* DCT Memory */
#define BG_DCTRAM_dctram193                      0x005f3304 /* DCT Memory */
#define BG_DCTRAM_dctram194                      0x005f3308 /* DCT Memory */
#define BG_DCTRAM_dctram195                      0x005f330c /* DCT Memory */
#define BG_DCTRAM_dctram196                      0x005f3310 /* DCT Memory */
#define BG_DCTRAM_dctram197                      0x005f3314 /* DCT Memory */
#define BG_DCTRAM_dctram198                      0x005f3318 /* DCT Memory */
#define BG_DCTRAM_dctram199                      0x005f331c /* DCT Memory */
#define BG_DCTRAM_dctram200                      0x005f3320 /* DCT Memory */
#define BG_DCTRAM_dctram201                      0x005f3324 /* DCT Memory */
#define BG_DCTRAM_dctram202                      0x005f3328 /* DCT Memory */
#define BG_DCTRAM_dctram203                      0x005f332c /* DCT Memory */
#define BG_DCTRAM_dctram204                      0x005f3330 /* DCT Memory */
#define BG_DCTRAM_dctram205                      0x005f3334 /* DCT Memory */
#define BG_DCTRAM_dctram206                      0x005f3338 /* DCT Memory */
#define BG_DCTRAM_dctram207                      0x005f333c /* DCT Memory */
#define BG_DCTRAM_dctram208                      0x005f3340 /* DCT Memory */
#define BG_DCTRAM_dctram209                      0x005f3344 /* DCT Memory */
#define BG_DCTRAM_dctram210                      0x005f3348 /* DCT Memory */
#define BG_DCTRAM_dctram211                      0x005f334c /* DCT Memory */
#define BG_DCTRAM_dctram212                      0x005f3350 /* DCT Memory */
#define BG_DCTRAM_dctram213                      0x005f3354 /* DCT Memory */
#define BG_DCTRAM_dctram214                      0x005f3358 /* DCT Memory */
#define BG_DCTRAM_dctram215                      0x005f335c /* DCT Memory */
#define BG_DCTRAM_dctram216                      0x005f3360 /* DCT Memory */
#define BG_DCTRAM_dctram217                      0x005f3364 /* DCT Memory */
#define BG_DCTRAM_dctram218                      0x005f3368 /* DCT Memory */
#define BG_DCTRAM_dctram219                      0x005f336c /* DCT Memory */
#define BG_DCTRAM_dctram220                      0x005f3370 /* DCT Memory */
#define BG_DCTRAM_dctram221                      0x005f3374 /* DCT Memory */
#define BG_DCTRAM_dctram222                      0x005f3378 /* DCT Memory */
#define BG_DCTRAM_dctram223                      0x005f337c /* DCT Memory */
#define BG_DCTRAM_dctram224                      0x005f3380 /* DCT Memory */
#define BG_DCTRAM_dctram225                      0x005f3384 /* DCT Memory */
#define BG_DCTRAM_dctram226                      0x005f3388 /* DCT Memory */
#define BG_DCTRAM_dctram227                      0x005f338c /* DCT Memory */
#define BG_DCTRAM_dctram228                      0x005f3390 /* DCT Memory */
#define BG_DCTRAM_dctram229                      0x005f3394 /* DCT Memory */
#define BG_DCTRAM_dctram230                      0x005f3398 /* DCT Memory */
#define BG_DCTRAM_dctram231                      0x005f339c /* DCT Memory */
#define BG_DCTRAM_dctram232                      0x005f33a0 /* DCT Memory */
#define BG_DCTRAM_dctram233                      0x005f33a4 /* DCT Memory */
#define BG_DCTRAM_dctram234                      0x005f33a8 /* DCT Memory */
#define BG_DCTRAM_dctram235                      0x005f33ac /* DCT Memory */
#define BG_DCTRAM_dctram236                      0x005f33b0 /* DCT Memory */
#define BG_DCTRAM_dctram237                      0x005f33b4 /* DCT Memory */
#define BG_DCTRAM_dctram238                      0x005f33b8 /* DCT Memory */
#define BG_DCTRAM_dctram239                      0x005f33bc /* DCT Memory */
#define BG_DCTRAM_dctram240                      0x005f33c0 /* DCT Memory */
#define BG_DCTRAM_dctram241                      0x005f33c4 /* DCT Memory */
#define BG_DCTRAM_dctram242                      0x005f33c8 /* DCT Memory */
#define BG_DCTRAM_dctram243                      0x005f33cc /* DCT Memory */
#define BG_DCTRAM_dctram244                      0x005f33d0 /* DCT Memory */
#define BG_DCTRAM_dctram245                      0x005f33d4 /* DCT Memory */
#define BG_DCTRAM_dctram246                      0x005f33d8 /* DCT Memory */
#define BG_DCTRAM_dctram247                      0x005f33dc /* DCT Memory */
#define BG_DCTRAM_dctram248                      0x005f33e0 /* DCT Memory */
#define BG_DCTRAM_dctram249                      0x005f33e4 /* DCT Memory */
#define BG_DCTRAM_dctram250                      0x005f33e8 /* DCT Memory */
#define BG_DCTRAM_dctram251                      0x005f33ec /* DCT Memory */
#define BG_DCTRAM_dctram252                      0x005f33f0 /* DCT Memory */
#define BG_DCTRAM_dctram253                      0x005f33f4 /* DCT Memory */
#define BG_DCTRAM_dctram254                      0x005f33f8 /* DCT Memory */
#define BG_DCTRAM_dctram255                      0x005f33fc /* DCT Memory */
#define BG_DCTRAM_dctram256                      0x005f3400 /* DCT Memory */
#define BG_DCTRAM_dctram257                      0x005f3404 /* DCT Memory */
#define BG_DCTRAM_dctram258                      0x005f3408 /* DCT Memory */
#define BG_DCTRAM_dctram259                      0x005f340c /* DCT Memory */
#define BG_DCTRAM_dctram260                      0x005f3410 /* DCT Memory */
#define BG_DCTRAM_dctram261                      0x005f3414 /* DCT Memory */
#define BG_DCTRAM_dctram262                      0x005f3418 /* DCT Memory */
#define BG_DCTRAM_dctram263                      0x005f341c /* DCT Memory */
#define BG_DCTRAM_dctram264                      0x005f3420 /* DCT Memory */
#define BG_DCTRAM_dctram265                      0x005f3424 /* DCT Memory */
#define BG_DCTRAM_dctram266                      0x005f3428 /* DCT Memory */
#define BG_DCTRAM_dctram267                      0x005f342c /* DCT Memory */
#define BG_DCTRAM_dctram268                      0x005f3430 /* DCT Memory */
#define BG_DCTRAM_dctram269                      0x005f3434 /* DCT Memory */
#define BG_DCTRAM_dctram270                      0x005f3438 /* DCT Memory */
#define BG_DCTRAM_dctram271                      0x005f343c /* DCT Memory */
#define BG_DCTRAM_dctram272                      0x005f3440 /* DCT Memory */
#define BG_DCTRAM_dctram273                      0x005f3444 /* DCT Memory */
#define BG_DCTRAM_dctram274                      0x005f3448 /* DCT Memory */
#define BG_DCTRAM_dctram275                      0x005f344c /* DCT Memory */
#define BG_DCTRAM_dctram276                      0x005f3450 /* DCT Memory */
#define BG_DCTRAM_dctram277                      0x005f3454 /* DCT Memory */
#define BG_DCTRAM_dctram278                      0x005f3458 /* DCT Memory */
#define BG_DCTRAM_dctram279                      0x005f345c /* DCT Memory */
#define BG_DCTRAM_dctram280                      0x005f3460 /* DCT Memory */
#define BG_DCTRAM_dctram281                      0x005f3464 /* DCT Memory */
#define BG_DCTRAM_dctram282                      0x005f3468 /* DCT Memory */
#define BG_DCTRAM_dctram283                      0x005f346c /* DCT Memory */
#define BG_DCTRAM_dctram284                      0x005f3470 /* DCT Memory */
#define BG_DCTRAM_dctram285                      0x005f3474 /* DCT Memory */
#define BG_DCTRAM_dctram286                      0x005f3478 /* DCT Memory */
#define BG_DCTRAM_dctram287                      0x005f347c /* DCT Memory */
#define BG_DCTRAM_dctram288                      0x005f3480 /* DCT Memory */
#define BG_DCTRAM_dctram289                      0x005f3484 /* DCT Memory */
#define BG_DCTRAM_dctram290                      0x005f3488 /* DCT Memory */
#define BG_DCTRAM_dctram291                      0x005f348c /* DCT Memory */
#define BG_DCTRAM_dctram292                      0x005f3490 /* DCT Memory */
#define BG_DCTRAM_dctram293                      0x005f3494 /* DCT Memory */
#define BG_DCTRAM_dctram294                      0x005f3498 /* DCT Memory */
#define BG_DCTRAM_dctram295                      0x005f349c /* DCT Memory */
#define BG_DCTRAM_dctram296                      0x005f34a0 /* DCT Memory */
#define BG_DCTRAM_dctram297                      0x005f34a4 /* DCT Memory */
#define BG_DCTRAM_dctram298                      0x005f34a8 /* DCT Memory */
#define BG_DCTRAM_dctram299                      0x005f34ac /* DCT Memory */
#define BG_DCTRAM_dctram300                      0x005f34b0 /* DCT Memory */
#define BG_DCTRAM_dctram301                      0x005f34b4 /* DCT Memory */
#define BG_DCTRAM_dctram302                      0x005f34b8 /* DCT Memory */
#define BG_DCTRAM_dctram303                      0x005f34bc /* DCT Memory */
#define BG_DCTRAM_dctram304                      0x005f34c0 /* DCT Memory */
#define BG_DCTRAM_dctram305                      0x005f34c4 /* DCT Memory */
#define BG_DCTRAM_dctram306                      0x005f34c8 /* DCT Memory */
#define BG_DCTRAM_dctram307                      0x005f34cc /* DCT Memory */
#define BG_DCTRAM_dctram308                      0x005f34d0 /* DCT Memory */
#define BG_DCTRAM_dctram309                      0x005f34d4 /* DCT Memory */
#define BG_DCTRAM_dctram310                      0x005f34d8 /* DCT Memory */
#define BG_DCTRAM_dctram311                      0x005f34dc /* DCT Memory */
#define BG_DCTRAM_dctram312                      0x005f34e0 /* DCT Memory */
#define BG_DCTRAM_dctram313                      0x005f34e4 /* DCT Memory */
#define BG_DCTRAM_dctram314                      0x005f34e8 /* DCT Memory */
#define BG_DCTRAM_dctram315                      0x005f34ec /* DCT Memory */
#define BG_DCTRAM_dctram316                      0x005f34f0 /* DCT Memory */
#define BG_DCTRAM_dctram317                      0x005f34f4 /* DCT Memory */
#define BG_DCTRAM_dctram318                      0x005f34f8 /* DCT Memory */
#define BG_DCTRAM_dctram319                      0x005f34fc /* DCT Memory */
#define BG_DCTRAM_dctram320                      0x005f3500 /* DCT Memory */
#define BG_DCTRAM_dctram321                      0x005f3504 /* DCT Memory */
#define BG_DCTRAM_dctram322                      0x005f3508 /* DCT Memory */
#define BG_DCTRAM_dctram323                      0x005f350c /* DCT Memory */
#define BG_DCTRAM_dctram324                      0x005f3510 /* DCT Memory */
#define BG_DCTRAM_dctram325                      0x005f3514 /* DCT Memory */
#define BG_DCTRAM_dctram326                      0x005f3518 /* DCT Memory */
#define BG_DCTRAM_dctram327                      0x005f351c /* DCT Memory */
#define BG_DCTRAM_dctram328                      0x005f3520 /* DCT Memory */
#define BG_DCTRAM_dctram329                      0x005f3524 /* DCT Memory */
#define BG_DCTRAM_dctram330                      0x005f3528 /* DCT Memory */
#define BG_DCTRAM_dctram331                      0x005f352c /* DCT Memory */
#define BG_DCTRAM_dctram332                      0x005f3530 /* DCT Memory */
#define BG_DCTRAM_dctram333                      0x005f3534 /* DCT Memory */
#define BG_DCTRAM_dctram334                      0x005f3538 /* DCT Memory */
#define BG_DCTRAM_dctram335                      0x005f353c /* DCT Memory */
#define BG_DCTRAM_dctram336                      0x005f3540 /* DCT Memory */
#define BG_DCTRAM_dctram337                      0x005f3544 /* DCT Memory */
#define BG_DCTRAM_dctram338                      0x005f3548 /* DCT Memory */
#define BG_DCTRAM_dctram339                      0x005f354c /* DCT Memory */
#define BG_DCTRAM_dctram340                      0x005f3550 /* DCT Memory */
#define BG_DCTRAM_dctram341                      0x005f3554 /* DCT Memory */
#define BG_DCTRAM_dctram342                      0x005f3558 /* DCT Memory */
#define BG_DCTRAM_dctram343                      0x005f355c /* DCT Memory */
#define BG_DCTRAM_dctram344                      0x005f3560 /* DCT Memory */
#define BG_DCTRAM_dctram345                      0x005f3564 /* DCT Memory */
#define BG_DCTRAM_dctram346                      0x005f3568 /* DCT Memory */
#define BG_DCTRAM_dctram347                      0x005f356c /* DCT Memory */
#define BG_DCTRAM_dctram348                      0x005f3570 /* DCT Memory */
#define BG_DCTRAM_dctram349                      0x005f3574 /* DCT Memory */
#define BG_DCTRAM_dctram350                      0x005f3578 /* DCT Memory */
#define BG_DCTRAM_dctram351                      0x005f357c /* DCT Memory */
#define BG_DCTRAM_dctram352                      0x005f3580 /* DCT Memory */
#define BG_DCTRAM_dctram353                      0x005f3584 /* DCT Memory */
#define BG_DCTRAM_dctram354                      0x005f3588 /* DCT Memory */
#define BG_DCTRAM_dctram355                      0x005f358c /* DCT Memory */
#define BG_DCTRAM_dctram356                      0x005f3590 /* DCT Memory */
#define BG_DCTRAM_dctram357                      0x005f3594 /* DCT Memory */
#define BG_DCTRAM_dctram358                      0x005f3598 /* DCT Memory */
#define BG_DCTRAM_dctram359                      0x005f359c /* DCT Memory */
#define BG_DCTRAM_dctram360                      0x005f35a0 /* DCT Memory */
#define BG_DCTRAM_dctram361                      0x005f35a4 /* DCT Memory */
#define BG_DCTRAM_dctram362                      0x005f35a8 /* DCT Memory */
#define BG_DCTRAM_dctram363                      0x005f35ac /* DCT Memory */
#define BG_DCTRAM_dctram364                      0x005f35b0 /* DCT Memory */
#define BG_DCTRAM_dctram365                      0x005f35b4 /* DCT Memory */
#define BG_DCTRAM_dctram366                      0x005f35b8 /* DCT Memory */
#define BG_DCTRAM_dctram367                      0x005f35bc /* DCT Memory */
#define BG_DCTRAM_dctram368                      0x005f35c0 /* DCT Memory */
#define BG_DCTRAM_dctram369                      0x005f35c4 /* DCT Memory */
#define BG_DCTRAM_dctram370                      0x005f35c8 /* DCT Memory */
#define BG_DCTRAM_dctram371                      0x005f35cc /* DCT Memory */
#define BG_DCTRAM_dctram372                      0x005f35d0 /* DCT Memory */
#define BG_DCTRAM_dctram373                      0x005f35d4 /* DCT Memory */
#define BG_DCTRAM_dctram374                      0x005f35d8 /* DCT Memory */
#define BG_DCTRAM_dctram375                      0x005f35dc /* DCT Memory */
#define BG_DCTRAM_dctram376                      0x005f35e0 /* DCT Memory */
#define BG_DCTRAM_dctram377                      0x005f35e4 /* DCT Memory */
#define BG_DCTRAM_dctram378                      0x005f35e8 /* DCT Memory */
#define BG_DCTRAM_dctram379                      0x005f35ec /* DCT Memory */
#define BG_DCTRAM_dctram380                      0x005f35f0 /* DCT Memory */
#define BG_DCTRAM_dctram381                      0x005f35f4 /* DCT Memory */
#define BG_DCTRAM_dctram382                      0x005f35f8 /* DCT Memory */
#define BG_DCTRAM_dctram383                      0x005f35fc /* DCT Memory */
#define BG_DCTRAM_dctram384                      0x005f3600 /* DCT Memory */
#define BG_DCTRAM_dctram385                      0x005f3604 /* DCT Memory */
#define BG_DCTRAM_dctram386                      0x005f3608 /* DCT Memory */
#define BG_DCTRAM_dctram387                      0x005f360c /* DCT Memory */
#define BG_DCTRAM_dctram388                      0x005f3610 /* DCT Memory */
#define BG_DCTRAM_dctram389                      0x005f3614 /* DCT Memory */
#define BG_DCTRAM_dctram390                      0x005f3618 /* DCT Memory */
#define BG_DCTRAM_dctram391                      0x005f361c /* DCT Memory */
#define BG_DCTRAM_dctram392                      0x005f3620 /* DCT Memory */
#define BG_DCTRAM_dctram393                      0x005f3624 /* DCT Memory */
#define BG_DCTRAM_dctram394                      0x005f3628 /* DCT Memory */
#define BG_DCTRAM_dctram395                      0x005f362c /* DCT Memory */
#define BG_DCTRAM_dctram396                      0x005f3630 /* DCT Memory */
#define BG_DCTRAM_dctram397                      0x005f3634 /* DCT Memory */
#define BG_DCTRAM_dctram398                      0x005f3638 /* DCT Memory */
#define BG_DCTRAM_dctram399                      0x005f363c /* DCT Memory */
#define BG_DCTRAM_dctram400                      0x005f3640 /* DCT Memory */
#define BG_DCTRAM_dctram401                      0x005f3644 /* DCT Memory */
#define BG_DCTRAM_dctram402                      0x005f3648 /* DCT Memory */
#define BG_DCTRAM_dctram403                      0x005f364c /* DCT Memory */
#define BG_DCTRAM_dctram404                      0x005f3650 /* DCT Memory */
#define BG_DCTRAM_dctram405                      0x005f3654 /* DCT Memory */
#define BG_DCTRAM_dctram406                      0x005f3658 /* DCT Memory */
#define BG_DCTRAM_dctram407                      0x005f365c /* DCT Memory */
#define BG_DCTRAM_dctram408                      0x005f3660 /* DCT Memory */
#define BG_DCTRAM_dctram409                      0x005f3664 /* DCT Memory */
#define BG_DCTRAM_dctram410                      0x005f3668 /* DCT Memory */
#define BG_DCTRAM_dctram411                      0x005f366c /* DCT Memory */
#define BG_DCTRAM_dctram412                      0x005f3670 /* DCT Memory */
#define BG_DCTRAM_dctram413                      0x005f3674 /* DCT Memory */
#define BG_DCTRAM_dctram414                      0x005f3678 /* DCT Memory */
#define BG_DCTRAM_dctram415                      0x005f367c /* DCT Memory */
#define BG_DCTRAM_dctram416                      0x005f3680 /* DCT Memory */
#define BG_DCTRAM_dctram417                      0x005f3684 /* DCT Memory */
#define BG_DCTRAM_dctram418                      0x005f3688 /* DCT Memory */
#define BG_DCTRAM_dctram419                      0x005f368c /* DCT Memory */
#define BG_DCTRAM_dctram420                      0x005f3690 /* DCT Memory */
#define BG_DCTRAM_dctram421                      0x005f3694 /* DCT Memory */
#define BG_DCTRAM_dctram422                      0x005f3698 /* DCT Memory */
#define BG_DCTRAM_dctram423                      0x005f369c /* DCT Memory */
#define BG_DCTRAM_dctram424                      0x005f36a0 /* DCT Memory */
#define BG_DCTRAM_dctram425                      0x005f36a4 /* DCT Memory */
#define BG_DCTRAM_dctram426                      0x005f36a8 /* DCT Memory */
#define BG_DCTRAM_dctram427                      0x005f36ac /* DCT Memory */
#define BG_DCTRAM_dctram428                      0x005f36b0 /* DCT Memory */
#define BG_DCTRAM_dctram429                      0x005f36b4 /* DCT Memory */
#define BG_DCTRAM_dctram430                      0x005f36b8 /* DCT Memory */
#define BG_DCTRAM_dctram431                      0x005f36bc /* DCT Memory */
#define BG_DCTRAM_dctram432                      0x005f36c0 /* DCT Memory */
#define BG_DCTRAM_dctram433                      0x005f36c4 /* DCT Memory */
#define BG_DCTRAM_dctram434                      0x005f36c8 /* DCT Memory */
#define BG_DCTRAM_dctram435                      0x005f36cc /* DCT Memory */
#define BG_DCTRAM_dctram436                      0x005f36d0 /* DCT Memory */
#define BG_DCTRAM_dctram437                      0x005f36d4 /* DCT Memory */
#define BG_DCTRAM_dctram438                      0x005f36d8 /* DCT Memory */
#define BG_DCTRAM_dctram439                      0x005f36dc /* DCT Memory */
#define BG_DCTRAM_dctram440                      0x005f36e0 /* DCT Memory */
#define BG_DCTRAM_dctram441                      0x005f36e4 /* DCT Memory */
#define BG_DCTRAM_dctram442                      0x005f36e8 /* DCT Memory */
#define BG_DCTRAM_dctram443                      0x005f36ec /* DCT Memory */
#define BG_DCTRAM_dctram444                      0x005f36f0 /* DCT Memory */
#define BG_DCTRAM_dctram445                      0x005f36f4 /* DCT Memory */
#define BG_DCTRAM_dctram446                      0x005f36f8 /* DCT Memory */
#define BG_DCTRAM_dctram447                      0x005f36fc /* DCT Memory */
#define BG_DCTRAM_dctram448                      0x005f3700 /* DCT Memory */
#define BG_DCTRAM_dctram449                      0x005f3704 /* DCT Memory */
#define BG_DCTRAM_dctram450                      0x005f3708 /* DCT Memory */
#define BG_DCTRAM_dctram451                      0x005f370c /* DCT Memory */
#define BG_DCTRAM_dctram452                      0x005f3710 /* DCT Memory */
#define BG_DCTRAM_dctram453                      0x005f3714 /* DCT Memory */
#define BG_DCTRAM_dctram454                      0x005f3718 /* DCT Memory */
#define BG_DCTRAM_dctram455                      0x005f371c /* DCT Memory */
#define BG_DCTRAM_dctram456                      0x005f3720 /* DCT Memory */
#define BG_DCTRAM_dctram457                      0x005f3724 /* DCT Memory */
#define BG_DCTRAM_dctram458                      0x005f3728 /* DCT Memory */
#define BG_DCTRAM_dctram459                      0x005f372c /* DCT Memory */
#define BG_DCTRAM_dctram460                      0x005f3730 /* DCT Memory */
#define BG_DCTRAM_dctram461                      0x005f3734 /* DCT Memory */
#define BG_DCTRAM_dctram462                      0x005f3738 /* DCT Memory */
#define BG_DCTRAM_dctram463                      0x005f373c /* DCT Memory */
#define BG_DCTRAM_dctram464                      0x005f3740 /* DCT Memory */
#define BG_DCTRAM_dctram465                      0x005f3744 /* DCT Memory */
#define BG_DCTRAM_dctram466                      0x005f3748 /* DCT Memory */
#define BG_DCTRAM_dctram467                      0x005f374c /* DCT Memory */
#define BG_DCTRAM_dctram468                      0x005f3750 /* DCT Memory */
#define BG_DCTRAM_dctram469                      0x005f3754 /* DCT Memory */
#define BG_DCTRAM_dctram470                      0x005f3758 /* DCT Memory */
#define BG_DCTRAM_dctram471                      0x005f375c /* DCT Memory */
#define BG_DCTRAM_dctram472                      0x005f3760 /* DCT Memory */
#define BG_DCTRAM_dctram473                      0x005f3764 /* DCT Memory */
#define BG_DCTRAM_dctram474                      0x005f3768 /* DCT Memory */
#define BG_DCTRAM_dctram475                      0x005f376c /* DCT Memory */
#define BG_DCTRAM_dctram476                      0x005f3770 /* DCT Memory */
#define BG_DCTRAM_dctram477                      0x005f3774 /* DCT Memory */
#define BG_DCTRAM_dctram478                      0x005f3778 /* DCT Memory */
#define BG_DCTRAM_dctram479                      0x005f377c /* DCT Memory */
#define BG_DCTRAM_dctram480                      0x005f3780 /* DCT Memory */
#define BG_DCTRAM_dctram481                      0x005f3784 /* DCT Memory */
#define BG_DCTRAM_dctram482                      0x005f3788 /* DCT Memory */
#define BG_DCTRAM_dctram483                      0x005f378c /* DCT Memory */
#define BG_DCTRAM_dctram484                      0x005f3790 /* DCT Memory */
#define BG_DCTRAM_dctram485                      0x005f3794 /* DCT Memory */
#define BG_DCTRAM_dctram486                      0x005f3798 /* DCT Memory */
#define BG_DCTRAM_dctram487                      0x005f379c /* DCT Memory */
#define BG_DCTRAM_dctram488                      0x005f37a0 /* DCT Memory */
#define BG_DCTRAM_dctram489                      0x005f37a4 /* DCT Memory */
#define BG_DCTRAM_dctram490                      0x005f37a8 /* DCT Memory */
#define BG_DCTRAM_dctram491                      0x005f37ac /* DCT Memory */
#define BG_DCTRAM_dctram492                      0x005f37b0 /* DCT Memory */
#define BG_DCTRAM_dctram493                      0x005f37b4 /* DCT Memory */
#define BG_DCTRAM_dctram494                      0x005f37b8 /* DCT Memory */
#define BG_DCTRAM_dctram495                      0x005f37bc /* DCT Memory */
#define BG_DCTRAM_dctram496                      0x005f37c0 /* DCT Memory */
#define BG_DCTRAM_dctram497                      0x005f37c4 /* DCT Memory */
#define BG_DCTRAM_dctram498                      0x005f37c8 /* DCT Memory */
#define BG_DCTRAM_dctram499                      0x005f37cc /* DCT Memory */
#define BG_DCTRAM_dctram500                      0x005f37d0 /* DCT Memory */
#define BG_DCTRAM_dctram501                      0x005f37d4 /* DCT Memory */
#define BG_DCTRAM_dctram502                      0x005f37d8 /* DCT Memory */
#define BG_DCTRAM_dctram503                      0x005f37dc /* DCT Memory */
#define BG_DCTRAM_dctram504                      0x005f37e0 /* DCT Memory */
#define BG_DCTRAM_dctram505                      0x005f37e4 /* DCT Memory */
#define BG_DCTRAM_dctram506                      0x005f37e8 /* DCT Memory */
#define BG_DCTRAM_dctram507                      0x005f37ec /* DCT Memory */
#define BG_DCTRAM_dctram508                      0x005f37f0 /* DCT Memory */
#define BG_DCTRAM_dctram509                      0x005f37f4 /* DCT Memory */
#define BG_DCTRAM_dctram510                      0x005f37f8 /* DCT Memory */
#define BG_DCTRAM_dctram511                      0x005f37fc /* DCT Memory */

/***************************************************************************
 *dctram0 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram0 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram0_reserved0_MASK                           0xfffff000
#define BG_DCTRAM_dctram0_reserved0_ALIGN                          0
#define BG_DCTRAM_dctram0_reserved0_BITS                           20
#define BG_DCTRAM_dctram0_reserved0_SHIFT                          12

/* BG_DCTRAM :: dctram0 :: DATA [11:00] */
#define BG_DCTRAM_dctram0_DATA_MASK                                0x00000fff
#define BG_DCTRAM_dctram0_DATA_ALIGN                               0
#define BG_DCTRAM_dctram0_DATA_BITS                                12
#define BG_DCTRAM_dctram0_DATA_SHIFT                               0

/***************************************************************************
 *dctram1 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram1 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram1_reserved0_MASK                           0xfffff000
#define BG_DCTRAM_dctram1_reserved0_ALIGN                          0
#define BG_DCTRAM_dctram1_reserved0_BITS                           20
#define BG_DCTRAM_dctram1_reserved0_SHIFT                          12

/* BG_DCTRAM :: dctram1 :: DATA [11:00] */
#define BG_DCTRAM_dctram1_DATA_MASK                                0x00000fff
#define BG_DCTRAM_dctram1_DATA_ALIGN                               0
#define BG_DCTRAM_dctram1_DATA_BITS                                12
#define BG_DCTRAM_dctram1_DATA_SHIFT                               0

/***************************************************************************
 *dctram2 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram2 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram2_reserved0_MASK                           0xfffff000
#define BG_DCTRAM_dctram2_reserved0_ALIGN                          0
#define BG_DCTRAM_dctram2_reserved0_BITS                           20
#define BG_DCTRAM_dctram2_reserved0_SHIFT                          12

/* BG_DCTRAM :: dctram2 :: DATA [11:00] */
#define BG_DCTRAM_dctram2_DATA_MASK                                0x00000fff
#define BG_DCTRAM_dctram2_DATA_ALIGN                               0
#define BG_DCTRAM_dctram2_DATA_BITS                                12
#define BG_DCTRAM_dctram2_DATA_SHIFT                               0

/***************************************************************************
 *dctram3 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram3 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram3_reserved0_MASK                           0xfffff000
#define BG_DCTRAM_dctram3_reserved0_ALIGN                          0
#define BG_DCTRAM_dctram3_reserved0_BITS                           20
#define BG_DCTRAM_dctram3_reserved0_SHIFT                          12

/* BG_DCTRAM :: dctram3 :: DATA [11:00] */
#define BG_DCTRAM_dctram3_DATA_MASK                                0x00000fff
#define BG_DCTRAM_dctram3_DATA_ALIGN                               0
#define BG_DCTRAM_dctram3_DATA_BITS                                12
#define BG_DCTRAM_dctram3_DATA_SHIFT                               0

/***************************************************************************
 *dctram4 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram4 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram4_reserved0_MASK                           0xfffff000
#define BG_DCTRAM_dctram4_reserved0_ALIGN                          0
#define BG_DCTRAM_dctram4_reserved0_BITS                           20
#define BG_DCTRAM_dctram4_reserved0_SHIFT                          12

/* BG_DCTRAM :: dctram4 :: DATA [11:00] */
#define BG_DCTRAM_dctram4_DATA_MASK                                0x00000fff
#define BG_DCTRAM_dctram4_DATA_ALIGN                               0
#define BG_DCTRAM_dctram4_DATA_BITS                                12
#define BG_DCTRAM_dctram4_DATA_SHIFT                               0

/***************************************************************************
 *dctram5 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram5 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram5_reserved0_MASK                           0xfffff000
#define BG_DCTRAM_dctram5_reserved0_ALIGN                          0
#define BG_DCTRAM_dctram5_reserved0_BITS                           20
#define BG_DCTRAM_dctram5_reserved0_SHIFT                          12

/* BG_DCTRAM :: dctram5 :: DATA [11:00] */
#define BG_DCTRAM_dctram5_DATA_MASK                                0x00000fff
#define BG_DCTRAM_dctram5_DATA_ALIGN                               0
#define BG_DCTRAM_dctram5_DATA_BITS                                12
#define BG_DCTRAM_dctram5_DATA_SHIFT                               0

/***************************************************************************
 *dctram6 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram6 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram6_reserved0_MASK                           0xfffff000
#define BG_DCTRAM_dctram6_reserved0_ALIGN                          0
#define BG_DCTRAM_dctram6_reserved0_BITS                           20
#define BG_DCTRAM_dctram6_reserved0_SHIFT                          12

/* BG_DCTRAM :: dctram6 :: DATA [11:00] */
#define BG_DCTRAM_dctram6_DATA_MASK                                0x00000fff
#define BG_DCTRAM_dctram6_DATA_ALIGN                               0
#define BG_DCTRAM_dctram6_DATA_BITS                                12
#define BG_DCTRAM_dctram6_DATA_SHIFT                               0

/***************************************************************************
 *dctram7 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram7 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram7_reserved0_MASK                           0xfffff000
#define BG_DCTRAM_dctram7_reserved0_ALIGN                          0
#define BG_DCTRAM_dctram7_reserved0_BITS                           20
#define BG_DCTRAM_dctram7_reserved0_SHIFT                          12

/* BG_DCTRAM :: dctram7 :: DATA [11:00] */
#define BG_DCTRAM_dctram7_DATA_MASK                                0x00000fff
#define BG_DCTRAM_dctram7_DATA_ALIGN                               0
#define BG_DCTRAM_dctram7_DATA_BITS                                12
#define BG_DCTRAM_dctram7_DATA_SHIFT                               0

/***************************************************************************
 *dctram8 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram8 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram8_reserved0_MASK                           0xfffff000
#define BG_DCTRAM_dctram8_reserved0_ALIGN                          0
#define BG_DCTRAM_dctram8_reserved0_BITS                           20
#define BG_DCTRAM_dctram8_reserved0_SHIFT                          12

/* BG_DCTRAM :: dctram8 :: DATA [11:00] */
#define BG_DCTRAM_dctram8_DATA_MASK                                0x00000fff
#define BG_DCTRAM_dctram8_DATA_ALIGN                               0
#define BG_DCTRAM_dctram8_DATA_BITS                                12
#define BG_DCTRAM_dctram8_DATA_SHIFT                               0

/***************************************************************************
 *dctram9 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram9 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram9_reserved0_MASK                           0xfffff000
#define BG_DCTRAM_dctram9_reserved0_ALIGN                          0
#define BG_DCTRAM_dctram9_reserved0_BITS                           20
#define BG_DCTRAM_dctram9_reserved0_SHIFT                          12

/* BG_DCTRAM :: dctram9 :: DATA [11:00] */
#define BG_DCTRAM_dctram9_DATA_MASK                                0x00000fff
#define BG_DCTRAM_dctram9_DATA_ALIGN                               0
#define BG_DCTRAM_dctram9_DATA_BITS                                12
#define BG_DCTRAM_dctram9_DATA_SHIFT                               0

/***************************************************************************
 *dctram10 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram10 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram10_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram10_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram10_reserved0_BITS                          20
#define BG_DCTRAM_dctram10_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram10 :: DATA [11:00] */
#define BG_DCTRAM_dctram10_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram10_DATA_ALIGN                              0
#define BG_DCTRAM_dctram10_DATA_BITS                               12
#define BG_DCTRAM_dctram10_DATA_SHIFT                              0

/***************************************************************************
 *dctram11 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram11 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram11_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram11_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram11_reserved0_BITS                          20
#define BG_DCTRAM_dctram11_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram11 :: DATA [11:00] */
#define BG_DCTRAM_dctram11_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram11_DATA_ALIGN                              0
#define BG_DCTRAM_dctram11_DATA_BITS                               12
#define BG_DCTRAM_dctram11_DATA_SHIFT                              0

/***************************************************************************
 *dctram12 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram12 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram12_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram12_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram12_reserved0_BITS                          20
#define BG_DCTRAM_dctram12_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram12 :: DATA [11:00] */
#define BG_DCTRAM_dctram12_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram12_DATA_ALIGN                              0
#define BG_DCTRAM_dctram12_DATA_BITS                               12
#define BG_DCTRAM_dctram12_DATA_SHIFT                              0

/***************************************************************************
 *dctram13 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram13 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram13_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram13_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram13_reserved0_BITS                          20
#define BG_DCTRAM_dctram13_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram13 :: DATA [11:00] */
#define BG_DCTRAM_dctram13_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram13_DATA_ALIGN                              0
#define BG_DCTRAM_dctram13_DATA_BITS                               12
#define BG_DCTRAM_dctram13_DATA_SHIFT                              0

/***************************************************************************
 *dctram14 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram14 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram14_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram14_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram14_reserved0_BITS                          20
#define BG_DCTRAM_dctram14_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram14 :: DATA [11:00] */
#define BG_DCTRAM_dctram14_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram14_DATA_ALIGN                              0
#define BG_DCTRAM_dctram14_DATA_BITS                               12
#define BG_DCTRAM_dctram14_DATA_SHIFT                              0

/***************************************************************************
 *dctram15 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram15 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram15_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram15_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram15_reserved0_BITS                          20
#define BG_DCTRAM_dctram15_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram15 :: DATA [11:00] */
#define BG_DCTRAM_dctram15_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram15_DATA_ALIGN                              0
#define BG_DCTRAM_dctram15_DATA_BITS                               12
#define BG_DCTRAM_dctram15_DATA_SHIFT                              0

/***************************************************************************
 *dctram16 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram16 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram16_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram16_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram16_reserved0_BITS                          20
#define BG_DCTRAM_dctram16_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram16 :: DATA [11:00] */
#define BG_DCTRAM_dctram16_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram16_DATA_ALIGN                              0
#define BG_DCTRAM_dctram16_DATA_BITS                               12
#define BG_DCTRAM_dctram16_DATA_SHIFT                              0

/***************************************************************************
 *dctram17 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram17 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram17_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram17_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram17_reserved0_BITS                          20
#define BG_DCTRAM_dctram17_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram17 :: DATA [11:00] */
#define BG_DCTRAM_dctram17_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram17_DATA_ALIGN                              0
#define BG_DCTRAM_dctram17_DATA_BITS                               12
#define BG_DCTRAM_dctram17_DATA_SHIFT                              0

/***************************************************************************
 *dctram18 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram18 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram18_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram18_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram18_reserved0_BITS                          20
#define BG_DCTRAM_dctram18_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram18 :: DATA [11:00] */
#define BG_DCTRAM_dctram18_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram18_DATA_ALIGN                              0
#define BG_DCTRAM_dctram18_DATA_BITS                               12
#define BG_DCTRAM_dctram18_DATA_SHIFT                              0

/***************************************************************************
 *dctram19 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram19 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram19_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram19_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram19_reserved0_BITS                          20
#define BG_DCTRAM_dctram19_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram19 :: DATA [11:00] */
#define BG_DCTRAM_dctram19_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram19_DATA_ALIGN                              0
#define BG_DCTRAM_dctram19_DATA_BITS                               12
#define BG_DCTRAM_dctram19_DATA_SHIFT                              0

/***************************************************************************
 *dctram20 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram20 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram20_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram20_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram20_reserved0_BITS                          20
#define BG_DCTRAM_dctram20_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram20 :: DATA [11:00] */
#define BG_DCTRAM_dctram20_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram20_DATA_ALIGN                              0
#define BG_DCTRAM_dctram20_DATA_BITS                               12
#define BG_DCTRAM_dctram20_DATA_SHIFT                              0

/***************************************************************************
 *dctram21 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram21 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram21_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram21_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram21_reserved0_BITS                          20
#define BG_DCTRAM_dctram21_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram21 :: DATA [11:00] */
#define BG_DCTRAM_dctram21_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram21_DATA_ALIGN                              0
#define BG_DCTRAM_dctram21_DATA_BITS                               12
#define BG_DCTRAM_dctram21_DATA_SHIFT                              0

/***************************************************************************
 *dctram22 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram22 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram22_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram22_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram22_reserved0_BITS                          20
#define BG_DCTRAM_dctram22_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram22 :: DATA [11:00] */
#define BG_DCTRAM_dctram22_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram22_DATA_ALIGN                              0
#define BG_DCTRAM_dctram22_DATA_BITS                               12
#define BG_DCTRAM_dctram22_DATA_SHIFT                              0

/***************************************************************************
 *dctram23 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram23 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram23_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram23_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram23_reserved0_BITS                          20
#define BG_DCTRAM_dctram23_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram23 :: DATA [11:00] */
#define BG_DCTRAM_dctram23_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram23_DATA_ALIGN                              0
#define BG_DCTRAM_dctram23_DATA_BITS                               12
#define BG_DCTRAM_dctram23_DATA_SHIFT                              0

/***************************************************************************
 *dctram24 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram24 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram24_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram24_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram24_reserved0_BITS                          20
#define BG_DCTRAM_dctram24_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram24 :: DATA [11:00] */
#define BG_DCTRAM_dctram24_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram24_DATA_ALIGN                              0
#define BG_DCTRAM_dctram24_DATA_BITS                               12
#define BG_DCTRAM_dctram24_DATA_SHIFT                              0

/***************************************************************************
 *dctram25 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram25 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram25_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram25_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram25_reserved0_BITS                          20
#define BG_DCTRAM_dctram25_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram25 :: DATA [11:00] */
#define BG_DCTRAM_dctram25_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram25_DATA_ALIGN                              0
#define BG_DCTRAM_dctram25_DATA_BITS                               12
#define BG_DCTRAM_dctram25_DATA_SHIFT                              0

/***************************************************************************
 *dctram26 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram26 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram26_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram26_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram26_reserved0_BITS                          20
#define BG_DCTRAM_dctram26_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram26 :: DATA [11:00] */
#define BG_DCTRAM_dctram26_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram26_DATA_ALIGN                              0
#define BG_DCTRAM_dctram26_DATA_BITS                               12
#define BG_DCTRAM_dctram26_DATA_SHIFT                              0

/***************************************************************************
 *dctram27 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram27 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram27_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram27_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram27_reserved0_BITS                          20
#define BG_DCTRAM_dctram27_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram27 :: DATA [11:00] */
#define BG_DCTRAM_dctram27_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram27_DATA_ALIGN                              0
#define BG_DCTRAM_dctram27_DATA_BITS                               12
#define BG_DCTRAM_dctram27_DATA_SHIFT                              0

/***************************************************************************
 *dctram28 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram28 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram28_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram28_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram28_reserved0_BITS                          20
#define BG_DCTRAM_dctram28_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram28 :: DATA [11:00] */
#define BG_DCTRAM_dctram28_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram28_DATA_ALIGN                              0
#define BG_DCTRAM_dctram28_DATA_BITS                               12
#define BG_DCTRAM_dctram28_DATA_SHIFT                              0

/***************************************************************************
 *dctram29 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram29 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram29_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram29_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram29_reserved0_BITS                          20
#define BG_DCTRAM_dctram29_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram29 :: DATA [11:00] */
#define BG_DCTRAM_dctram29_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram29_DATA_ALIGN                              0
#define BG_DCTRAM_dctram29_DATA_BITS                               12
#define BG_DCTRAM_dctram29_DATA_SHIFT                              0

/***************************************************************************
 *dctram30 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram30 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram30_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram30_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram30_reserved0_BITS                          20
#define BG_DCTRAM_dctram30_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram30 :: DATA [11:00] */
#define BG_DCTRAM_dctram30_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram30_DATA_ALIGN                              0
#define BG_DCTRAM_dctram30_DATA_BITS                               12
#define BG_DCTRAM_dctram30_DATA_SHIFT                              0

/***************************************************************************
 *dctram31 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram31 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram31_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram31_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram31_reserved0_BITS                          20
#define BG_DCTRAM_dctram31_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram31 :: DATA [11:00] */
#define BG_DCTRAM_dctram31_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram31_DATA_ALIGN                              0
#define BG_DCTRAM_dctram31_DATA_BITS                               12
#define BG_DCTRAM_dctram31_DATA_SHIFT                              0

/***************************************************************************
 *dctram32 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram32 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram32_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram32_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram32_reserved0_BITS                          20
#define BG_DCTRAM_dctram32_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram32 :: DATA [11:00] */
#define BG_DCTRAM_dctram32_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram32_DATA_ALIGN                              0
#define BG_DCTRAM_dctram32_DATA_BITS                               12
#define BG_DCTRAM_dctram32_DATA_SHIFT                              0

/***************************************************************************
 *dctram33 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram33 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram33_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram33_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram33_reserved0_BITS                          20
#define BG_DCTRAM_dctram33_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram33 :: DATA [11:00] */
#define BG_DCTRAM_dctram33_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram33_DATA_ALIGN                              0
#define BG_DCTRAM_dctram33_DATA_BITS                               12
#define BG_DCTRAM_dctram33_DATA_SHIFT                              0

/***************************************************************************
 *dctram34 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram34 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram34_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram34_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram34_reserved0_BITS                          20
#define BG_DCTRAM_dctram34_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram34 :: DATA [11:00] */
#define BG_DCTRAM_dctram34_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram34_DATA_ALIGN                              0
#define BG_DCTRAM_dctram34_DATA_BITS                               12
#define BG_DCTRAM_dctram34_DATA_SHIFT                              0

/***************************************************************************
 *dctram35 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram35 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram35_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram35_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram35_reserved0_BITS                          20
#define BG_DCTRAM_dctram35_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram35 :: DATA [11:00] */
#define BG_DCTRAM_dctram35_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram35_DATA_ALIGN                              0
#define BG_DCTRAM_dctram35_DATA_BITS                               12
#define BG_DCTRAM_dctram35_DATA_SHIFT                              0

/***************************************************************************
 *dctram36 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram36 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram36_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram36_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram36_reserved0_BITS                          20
#define BG_DCTRAM_dctram36_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram36 :: DATA [11:00] */
#define BG_DCTRAM_dctram36_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram36_DATA_ALIGN                              0
#define BG_DCTRAM_dctram36_DATA_BITS                               12
#define BG_DCTRAM_dctram36_DATA_SHIFT                              0

/***************************************************************************
 *dctram37 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram37 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram37_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram37_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram37_reserved0_BITS                          20
#define BG_DCTRAM_dctram37_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram37 :: DATA [11:00] */
#define BG_DCTRAM_dctram37_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram37_DATA_ALIGN                              0
#define BG_DCTRAM_dctram37_DATA_BITS                               12
#define BG_DCTRAM_dctram37_DATA_SHIFT                              0

/***************************************************************************
 *dctram38 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram38 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram38_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram38_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram38_reserved0_BITS                          20
#define BG_DCTRAM_dctram38_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram38 :: DATA [11:00] */
#define BG_DCTRAM_dctram38_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram38_DATA_ALIGN                              0
#define BG_DCTRAM_dctram38_DATA_BITS                               12
#define BG_DCTRAM_dctram38_DATA_SHIFT                              0

/***************************************************************************
 *dctram39 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram39 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram39_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram39_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram39_reserved0_BITS                          20
#define BG_DCTRAM_dctram39_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram39 :: DATA [11:00] */
#define BG_DCTRAM_dctram39_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram39_DATA_ALIGN                              0
#define BG_DCTRAM_dctram39_DATA_BITS                               12
#define BG_DCTRAM_dctram39_DATA_SHIFT                              0

/***************************************************************************
 *dctram40 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram40 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram40_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram40_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram40_reserved0_BITS                          20
#define BG_DCTRAM_dctram40_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram40 :: DATA [11:00] */
#define BG_DCTRAM_dctram40_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram40_DATA_ALIGN                              0
#define BG_DCTRAM_dctram40_DATA_BITS                               12
#define BG_DCTRAM_dctram40_DATA_SHIFT                              0

/***************************************************************************
 *dctram41 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram41 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram41_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram41_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram41_reserved0_BITS                          20
#define BG_DCTRAM_dctram41_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram41 :: DATA [11:00] */
#define BG_DCTRAM_dctram41_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram41_DATA_ALIGN                              0
#define BG_DCTRAM_dctram41_DATA_BITS                               12
#define BG_DCTRAM_dctram41_DATA_SHIFT                              0

/***************************************************************************
 *dctram42 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram42 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram42_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram42_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram42_reserved0_BITS                          20
#define BG_DCTRAM_dctram42_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram42 :: DATA [11:00] */
#define BG_DCTRAM_dctram42_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram42_DATA_ALIGN                              0
#define BG_DCTRAM_dctram42_DATA_BITS                               12
#define BG_DCTRAM_dctram42_DATA_SHIFT                              0

/***************************************************************************
 *dctram43 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram43 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram43_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram43_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram43_reserved0_BITS                          20
#define BG_DCTRAM_dctram43_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram43 :: DATA [11:00] */
#define BG_DCTRAM_dctram43_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram43_DATA_ALIGN                              0
#define BG_DCTRAM_dctram43_DATA_BITS                               12
#define BG_DCTRAM_dctram43_DATA_SHIFT                              0

/***************************************************************************
 *dctram44 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram44 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram44_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram44_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram44_reserved0_BITS                          20
#define BG_DCTRAM_dctram44_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram44 :: DATA [11:00] */
#define BG_DCTRAM_dctram44_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram44_DATA_ALIGN                              0
#define BG_DCTRAM_dctram44_DATA_BITS                               12
#define BG_DCTRAM_dctram44_DATA_SHIFT                              0

/***************************************************************************
 *dctram45 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram45 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram45_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram45_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram45_reserved0_BITS                          20
#define BG_DCTRAM_dctram45_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram45 :: DATA [11:00] */
#define BG_DCTRAM_dctram45_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram45_DATA_ALIGN                              0
#define BG_DCTRAM_dctram45_DATA_BITS                               12
#define BG_DCTRAM_dctram45_DATA_SHIFT                              0

/***************************************************************************
 *dctram46 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram46 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram46_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram46_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram46_reserved0_BITS                          20
#define BG_DCTRAM_dctram46_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram46 :: DATA [11:00] */
#define BG_DCTRAM_dctram46_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram46_DATA_ALIGN                              0
#define BG_DCTRAM_dctram46_DATA_BITS                               12
#define BG_DCTRAM_dctram46_DATA_SHIFT                              0

/***************************************************************************
 *dctram47 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram47 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram47_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram47_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram47_reserved0_BITS                          20
#define BG_DCTRAM_dctram47_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram47 :: DATA [11:00] */
#define BG_DCTRAM_dctram47_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram47_DATA_ALIGN                              0
#define BG_DCTRAM_dctram47_DATA_BITS                               12
#define BG_DCTRAM_dctram47_DATA_SHIFT                              0

/***************************************************************************
 *dctram48 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram48 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram48_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram48_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram48_reserved0_BITS                          20
#define BG_DCTRAM_dctram48_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram48 :: DATA [11:00] */
#define BG_DCTRAM_dctram48_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram48_DATA_ALIGN                              0
#define BG_DCTRAM_dctram48_DATA_BITS                               12
#define BG_DCTRAM_dctram48_DATA_SHIFT                              0

/***************************************************************************
 *dctram49 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram49 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram49_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram49_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram49_reserved0_BITS                          20
#define BG_DCTRAM_dctram49_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram49 :: DATA [11:00] */
#define BG_DCTRAM_dctram49_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram49_DATA_ALIGN                              0
#define BG_DCTRAM_dctram49_DATA_BITS                               12
#define BG_DCTRAM_dctram49_DATA_SHIFT                              0

/***************************************************************************
 *dctram50 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram50 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram50_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram50_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram50_reserved0_BITS                          20
#define BG_DCTRAM_dctram50_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram50 :: DATA [11:00] */
#define BG_DCTRAM_dctram50_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram50_DATA_ALIGN                              0
#define BG_DCTRAM_dctram50_DATA_BITS                               12
#define BG_DCTRAM_dctram50_DATA_SHIFT                              0

/***************************************************************************
 *dctram51 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram51 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram51_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram51_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram51_reserved0_BITS                          20
#define BG_DCTRAM_dctram51_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram51 :: DATA [11:00] */
#define BG_DCTRAM_dctram51_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram51_DATA_ALIGN                              0
#define BG_DCTRAM_dctram51_DATA_BITS                               12
#define BG_DCTRAM_dctram51_DATA_SHIFT                              0

/***************************************************************************
 *dctram52 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram52 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram52_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram52_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram52_reserved0_BITS                          20
#define BG_DCTRAM_dctram52_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram52 :: DATA [11:00] */
#define BG_DCTRAM_dctram52_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram52_DATA_ALIGN                              0
#define BG_DCTRAM_dctram52_DATA_BITS                               12
#define BG_DCTRAM_dctram52_DATA_SHIFT                              0

/***************************************************************************
 *dctram53 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram53 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram53_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram53_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram53_reserved0_BITS                          20
#define BG_DCTRAM_dctram53_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram53 :: DATA [11:00] */
#define BG_DCTRAM_dctram53_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram53_DATA_ALIGN                              0
#define BG_DCTRAM_dctram53_DATA_BITS                               12
#define BG_DCTRAM_dctram53_DATA_SHIFT                              0

/***************************************************************************
 *dctram54 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram54 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram54_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram54_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram54_reserved0_BITS                          20
#define BG_DCTRAM_dctram54_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram54 :: DATA [11:00] */
#define BG_DCTRAM_dctram54_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram54_DATA_ALIGN                              0
#define BG_DCTRAM_dctram54_DATA_BITS                               12
#define BG_DCTRAM_dctram54_DATA_SHIFT                              0

/***************************************************************************
 *dctram55 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram55 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram55_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram55_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram55_reserved0_BITS                          20
#define BG_DCTRAM_dctram55_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram55 :: DATA [11:00] */
#define BG_DCTRAM_dctram55_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram55_DATA_ALIGN                              0
#define BG_DCTRAM_dctram55_DATA_BITS                               12
#define BG_DCTRAM_dctram55_DATA_SHIFT                              0

/***************************************************************************
 *dctram56 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram56 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram56_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram56_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram56_reserved0_BITS                          20
#define BG_DCTRAM_dctram56_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram56 :: DATA [11:00] */
#define BG_DCTRAM_dctram56_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram56_DATA_ALIGN                              0
#define BG_DCTRAM_dctram56_DATA_BITS                               12
#define BG_DCTRAM_dctram56_DATA_SHIFT                              0

/***************************************************************************
 *dctram57 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram57 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram57_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram57_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram57_reserved0_BITS                          20
#define BG_DCTRAM_dctram57_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram57 :: DATA [11:00] */
#define BG_DCTRAM_dctram57_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram57_DATA_ALIGN                              0
#define BG_DCTRAM_dctram57_DATA_BITS                               12
#define BG_DCTRAM_dctram57_DATA_SHIFT                              0

/***************************************************************************
 *dctram58 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram58 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram58_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram58_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram58_reserved0_BITS                          20
#define BG_DCTRAM_dctram58_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram58 :: DATA [11:00] */
#define BG_DCTRAM_dctram58_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram58_DATA_ALIGN                              0
#define BG_DCTRAM_dctram58_DATA_BITS                               12
#define BG_DCTRAM_dctram58_DATA_SHIFT                              0

/***************************************************************************
 *dctram59 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram59 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram59_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram59_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram59_reserved0_BITS                          20
#define BG_DCTRAM_dctram59_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram59 :: DATA [11:00] */
#define BG_DCTRAM_dctram59_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram59_DATA_ALIGN                              0
#define BG_DCTRAM_dctram59_DATA_BITS                               12
#define BG_DCTRAM_dctram59_DATA_SHIFT                              0

/***************************************************************************
 *dctram60 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram60 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram60_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram60_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram60_reserved0_BITS                          20
#define BG_DCTRAM_dctram60_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram60 :: DATA [11:00] */
#define BG_DCTRAM_dctram60_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram60_DATA_ALIGN                              0
#define BG_DCTRAM_dctram60_DATA_BITS                               12
#define BG_DCTRAM_dctram60_DATA_SHIFT                              0

/***************************************************************************
 *dctram61 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram61 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram61_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram61_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram61_reserved0_BITS                          20
#define BG_DCTRAM_dctram61_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram61 :: DATA [11:00] */
#define BG_DCTRAM_dctram61_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram61_DATA_ALIGN                              0
#define BG_DCTRAM_dctram61_DATA_BITS                               12
#define BG_DCTRAM_dctram61_DATA_SHIFT                              0

/***************************************************************************
 *dctram62 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram62 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram62_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram62_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram62_reserved0_BITS                          20
#define BG_DCTRAM_dctram62_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram62 :: DATA [11:00] */
#define BG_DCTRAM_dctram62_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram62_DATA_ALIGN                              0
#define BG_DCTRAM_dctram62_DATA_BITS                               12
#define BG_DCTRAM_dctram62_DATA_SHIFT                              0

/***************************************************************************
 *dctram63 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram63 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram63_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram63_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram63_reserved0_BITS                          20
#define BG_DCTRAM_dctram63_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram63 :: DATA [11:00] */
#define BG_DCTRAM_dctram63_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram63_DATA_ALIGN                              0
#define BG_DCTRAM_dctram63_DATA_BITS                               12
#define BG_DCTRAM_dctram63_DATA_SHIFT                              0

/***************************************************************************
 *dctram64 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram64 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram64_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram64_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram64_reserved0_BITS                          20
#define BG_DCTRAM_dctram64_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram64 :: DATA [11:00] */
#define BG_DCTRAM_dctram64_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram64_DATA_ALIGN                              0
#define BG_DCTRAM_dctram64_DATA_BITS                               12
#define BG_DCTRAM_dctram64_DATA_SHIFT                              0

/***************************************************************************
 *dctram65 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram65 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram65_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram65_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram65_reserved0_BITS                          20
#define BG_DCTRAM_dctram65_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram65 :: DATA [11:00] */
#define BG_DCTRAM_dctram65_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram65_DATA_ALIGN                              0
#define BG_DCTRAM_dctram65_DATA_BITS                               12
#define BG_DCTRAM_dctram65_DATA_SHIFT                              0

/***************************************************************************
 *dctram66 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram66 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram66_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram66_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram66_reserved0_BITS                          20
#define BG_DCTRAM_dctram66_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram66 :: DATA [11:00] */
#define BG_DCTRAM_dctram66_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram66_DATA_ALIGN                              0
#define BG_DCTRAM_dctram66_DATA_BITS                               12
#define BG_DCTRAM_dctram66_DATA_SHIFT                              0

/***************************************************************************
 *dctram67 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram67 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram67_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram67_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram67_reserved0_BITS                          20
#define BG_DCTRAM_dctram67_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram67 :: DATA [11:00] */
#define BG_DCTRAM_dctram67_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram67_DATA_ALIGN                              0
#define BG_DCTRAM_dctram67_DATA_BITS                               12
#define BG_DCTRAM_dctram67_DATA_SHIFT                              0

/***************************************************************************
 *dctram68 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram68 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram68_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram68_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram68_reserved0_BITS                          20
#define BG_DCTRAM_dctram68_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram68 :: DATA [11:00] */
#define BG_DCTRAM_dctram68_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram68_DATA_ALIGN                              0
#define BG_DCTRAM_dctram68_DATA_BITS                               12
#define BG_DCTRAM_dctram68_DATA_SHIFT                              0

/***************************************************************************
 *dctram69 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram69 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram69_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram69_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram69_reserved0_BITS                          20
#define BG_DCTRAM_dctram69_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram69 :: DATA [11:00] */
#define BG_DCTRAM_dctram69_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram69_DATA_ALIGN                              0
#define BG_DCTRAM_dctram69_DATA_BITS                               12
#define BG_DCTRAM_dctram69_DATA_SHIFT                              0

/***************************************************************************
 *dctram70 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram70 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram70_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram70_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram70_reserved0_BITS                          20
#define BG_DCTRAM_dctram70_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram70 :: DATA [11:00] */
#define BG_DCTRAM_dctram70_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram70_DATA_ALIGN                              0
#define BG_DCTRAM_dctram70_DATA_BITS                               12
#define BG_DCTRAM_dctram70_DATA_SHIFT                              0

/***************************************************************************
 *dctram71 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram71 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram71_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram71_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram71_reserved0_BITS                          20
#define BG_DCTRAM_dctram71_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram71 :: DATA [11:00] */
#define BG_DCTRAM_dctram71_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram71_DATA_ALIGN                              0
#define BG_DCTRAM_dctram71_DATA_BITS                               12
#define BG_DCTRAM_dctram71_DATA_SHIFT                              0

/***************************************************************************
 *dctram72 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram72 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram72_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram72_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram72_reserved0_BITS                          20
#define BG_DCTRAM_dctram72_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram72 :: DATA [11:00] */
#define BG_DCTRAM_dctram72_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram72_DATA_ALIGN                              0
#define BG_DCTRAM_dctram72_DATA_BITS                               12
#define BG_DCTRAM_dctram72_DATA_SHIFT                              0

/***************************************************************************
 *dctram73 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram73 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram73_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram73_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram73_reserved0_BITS                          20
#define BG_DCTRAM_dctram73_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram73 :: DATA [11:00] */
#define BG_DCTRAM_dctram73_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram73_DATA_ALIGN                              0
#define BG_DCTRAM_dctram73_DATA_BITS                               12
#define BG_DCTRAM_dctram73_DATA_SHIFT                              0

/***************************************************************************
 *dctram74 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram74 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram74_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram74_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram74_reserved0_BITS                          20
#define BG_DCTRAM_dctram74_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram74 :: DATA [11:00] */
#define BG_DCTRAM_dctram74_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram74_DATA_ALIGN                              0
#define BG_DCTRAM_dctram74_DATA_BITS                               12
#define BG_DCTRAM_dctram74_DATA_SHIFT                              0

/***************************************************************************
 *dctram75 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram75 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram75_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram75_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram75_reserved0_BITS                          20
#define BG_DCTRAM_dctram75_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram75 :: DATA [11:00] */
#define BG_DCTRAM_dctram75_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram75_DATA_ALIGN                              0
#define BG_DCTRAM_dctram75_DATA_BITS                               12
#define BG_DCTRAM_dctram75_DATA_SHIFT                              0

/***************************************************************************
 *dctram76 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram76 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram76_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram76_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram76_reserved0_BITS                          20
#define BG_DCTRAM_dctram76_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram76 :: DATA [11:00] */
#define BG_DCTRAM_dctram76_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram76_DATA_ALIGN                              0
#define BG_DCTRAM_dctram76_DATA_BITS                               12
#define BG_DCTRAM_dctram76_DATA_SHIFT                              0

/***************************************************************************
 *dctram77 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram77 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram77_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram77_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram77_reserved0_BITS                          20
#define BG_DCTRAM_dctram77_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram77 :: DATA [11:00] */
#define BG_DCTRAM_dctram77_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram77_DATA_ALIGN                              0
#define BG_DCTRAM_dctram77_DATA_BITS                               12
#define BG_DCTRAM_dctram77_DATA_SHIFT                              0

/***************************************************************************
 *dctram78 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram78 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram78_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram78_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram78_reserved0_BITS                          20
#define BG_DCTRAM_dctram78_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram78 :: DATA [11:00] */
#define BG_DCTRAM_dctram78_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram78_DATA_ALIGN                              0
#define BG_DCTRAM_dctram78_DATA_BITS                               12
#define BG_DCTRAM_dctram78_DATA_SHIFT                              0

/***************************************************************************
 *dctram79 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram79 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram79_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram79_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram79_reserved0_BITS                          20
#define BG_DCTRAM_dctram79_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram79 :: DATA [11:00] */
#define BG_DCTRAM_dctram79_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram79_DATA_ALIGN                              0
#define BG_DCTRAM_dctram79_DATA_BITS                               12
#define BG_DCTRAM_dctram79_DATA_SHIFT                              0

/***************************************************************************
 *dctram80 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram80 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram80_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram80_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram80_reserved0_BITS                          20
#define BG_DCTRAM_dctram80_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram80 :: DATA [11:00] */
#define BG_DCTRAM_dctram80_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram80_DATA_ALIGN                              0
#define BG_DCTRAM_dctram80_DATA_BITS                               12
#define BG_DCTRAM_dctram80_DATA_SHIFT                              0

/***************************************************************************
 *dctram81 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram81 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram81_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram81_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram81_reserved0_BITS                          20
#define BG_DCTRAM_dctram81_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram81 :: DATA [11:00] */
#define BG_DCTRAM_dctram81_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram81_DATA_ALIGN                              0
#define BG_DCTRAM_dctram81_DATA_BITS                               12
#define BG_DCTRAM_dctram81_DATA_SHIFT                              0

/***************************************************************************
 *dctram82 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram82 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram82_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram82_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram82_reserved0_BITS                          20
#define BG_DCTRAM_dctram82_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram82 :: DATA [11:00] */
#define BG_DCTRAM_dctram82_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram82_DATA_ALIGN                              0
#define BG_DCTRAM_dctram82_DATA_BITS                               12
#define BG_DCTRAM_dctram82_DATA_SHIFT                              0

/***************************************************************************
 *dctram83 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram83 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram83_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram83_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram83_reserved0_BITS                          20
#define BG_DCTRAM_dctram83_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram83 :: DATA [11:00] */
#define BG_DCTRAM_dctram83_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram83_DATA_ALIGN                              0
#define BG_DCTRAM_dctram83_DATA_BITS                               12
#define BG_DCTRAM_dctram83_DATA_SHIFT                              0

/***************************************************************************
 *dctram84 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram84 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram84_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram84_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram84_reserved0_BITS                          20
#define BG_DCTRAM_dctram84_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram84 :: DATA [11:00] */
#define BG_DCTRAM_dctram84_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram84_DATA_ALIGN                              0
#define BG_DCTRAM_dctram84_DATA_BITS                               12
#define BG_DCTRAM_dctram84_DATA_SHIFT                              0

/***************************************************************************
 *dctram85 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram85 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram85_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram85_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram85_reserved0_BITS                          20
#define BG_DCTRAM_dctram85_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram85 :: DATA [11:00] */
#define BG_DCTRAM_dctram85_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram85_DATA_ALIGN                              0
#define BG_DCTRAM_dctram85_DATA_BITS                               12
#define BG_DCTRAM_dctram85_DATA_SHIFT                              0

/***************************************************************************
 *dctram86 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram86 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram86_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram86_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram86_reserved0_BITS                          20
#define BG_DCTRAM_dctram86_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram86 :: DATA [11:00] */
#define BG_DCTRAM_dctram86_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram86_DATA_ALIGN                              0
#define BG_DCTRAM_dctram86_DATA_BITS                               12
#define BG_DCTRAM_dctram86_DATA_SHIFT                              0

/***************************************************************************
 *dctram87 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram87 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram87_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram87_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram87_reserved0_BITS                          20
#define BG_DCTRAM_dctram87_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram87 :: DATA [11:00] */
#define BG_DCTRAM_dctram87_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram87_DATA_ALIGN                              0
#define BG_DCTRAM_dctram87_DATA_BITS                               12
#define BG_DCTRAM_dctram87_DATA_SHIFT                              0

/***************************************************************************
 *dctram88 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram88 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram88_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram88_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram88_reserved0_BITS                          20
#define BG_DCTRAM_dctram88_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram88 :: DATA [11:00] */
#define BG_DCTRAM_dctram88_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram88_DATA_ALIGN                              0
#define BG_DCTRAM_dctram88_DATA_BITS                               12
#define BG_DCTRAM_dctram88_DATA_SHIFT                              0

/***************************************************************************
 *dctram89 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram89 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram89_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram89_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram89_reserved0_BITS                          20
#define BG_DCTRAM_dctram89_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram89 :: DATA [11:00] */
#define BG_DCTRAM_dctram89_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram89_DATA_ALIGN                              0
#define BG_DCTRAM_dctram89_DATA_BITS                               12
#define BG_DCTRAM_dctram89_DATA_SHIFT                              0

/***************************************************************************
 *dctram90 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram90 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram90_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram90_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram90_reserved0_BITS                          20
#define BG_DCTRAM_dctram90_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram90 :: DATA [11:00] */
#define BG_DCTRAM_dctram90_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram90_DATA_ALIGN                              0
#define BG_DCTRAM_dctram90_DATA_BITS                               12
#define BG_DCTRAM_dctram90_DATA_SHIFT                              0

/***************************************************************************
 *dctram91 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram91 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram91_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram91_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram91_reserved0_BITS                          20
#define BG_DCTRAM_dctram91_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram91 :: DATA [11:00] */
#define BG_DCTRAM_dctram91_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram91_DATA_ALIGN                              0
#define BG_DCTRAM_dctram91_DATA_BITS                               12
#define BG_DCTRAM_dctram91_DATA_SHIFT                              0

/***************************************************************************
 *dctram92 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram92 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram92_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram92_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram92_reserved0_BITS                          20
#define BG_DCTRAM_dctram92_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram92 :: DATA [11:00] */
#define BG_DCTRAM_dctram92_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram92_DATA_ALIGN                              0
#define BG_DCTRAM_dctram92_DATA_BITS                               12
#define BG_DCTRAM_dctram92_DATA_SHIFT                              0

/***************************************************************************
 *dctram93 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram93 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram93_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram93_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram93_reserved0_BITS                          20
#define BG_DCTRAM_dctram93_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram93 :: DATA [11:00] */
#define BG_DCTRAM_dctram93_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram93_DATA_ALIGN                              0
#define BG_DCTRAM_dctram93_DATA_BITS                               12
#define BG_DCTRAM_dctram93_DATA_SHIFT                              0

/***************************************************************************
 *dctram94 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram94 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram94_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram94_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram94_reserved0_BITS                          20
#define BG_DCTRAM_dctram94_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram94 :: DATA [11:00] */
#define BG_DCTRAM_dctram94_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram94_DATA_ALIGN                              0
#define BG_DCTRAM_dctram94_DATA_BITS                               12
#define BG_DCTRAM_dctram94_DATA_SHIFT                              0

/***************************************************************************
 *dctram95 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram95 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram95_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram95_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram95_reserved0_BITS                          20
#define BG_DCTRAM_dctram95_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram95 :: DATA [11:00] */
#define BG_DCTRAM_dctram95_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram95_DATA_ALIGN                              0
#define BG_DCTRAM_dctram95_DATA_BITS                               12
#define BG_DCTRAM_dctram95_DATA_SHIFT                              0

/***************************************************************************
 *dctram96 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram96 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram96_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram96_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram96_reserved0_BITS                          20
#define BG_DCTRAM_dctram96_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram96 :: DATA [11:00] */
#define BG_DCTRAM_dctram96_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram96_DATA_ALIGN                              0
#define BG_DCTRAM_dctram96_DATA_BITS                               12
#define BG_DCTRAM_dctram96_DATA_SHIFT                              0

/***************************************************************************
 *dctram97 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram97 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram97_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram97_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram97_reserved0_BITS                          20
#define BG_DCTRAM_dctram97_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram97 :: DATA [11:00] */
#define BG_DCTRAM_dctram97_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram97_DATA_ALIGN                              0
#define BG_DCTRAM_dctram97_DATA_BITS                               12
#define BG_DCTRAM_dctram97_DATA_SHIFT                              0

/***************************************************************************
 *dctram98 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram98 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram98_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram98_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram98_reserved0_BITS                          20
#define BG_DCTRAM_dctram98_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram98 :: DATA [11:00] */
#define BG_DCTRAM_dctram98_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram98_DATA_ALIGN                              0
#define BG_DCTRAM_dctram98_DATA_BITS                               12
#define BG_DCTRAM_dctram98_DATA_SHIFT                              0

/***************************************************************************
 *dctram99 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram99 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram99_reserved0_MASK                          0xfffff000
#define BG_DCTRAM_dctram99_reserved0_ALIGN                         0
#define BG_DCTRAM_dctram99_reserved0_BITS                          20
#define BG_DCTRAM_dctram99_reserved0_SHIFT                         12

/* BG_DCTRAM :: dctram99 :: DATA [11:00] */
#define BG_DCTRAM_dctram99_DATA_MASK                               0x00000fff
#define BG_DCTRAM_dctram99_DATA_ALIGN                              0
#define BG_DCTRAM_dctram99_DATA_BITS                               12
#define BG_DCTRAM_dctram99_DATA_SHIFT                              0

/***************************************************************************
 *dctram100 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram100 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram100_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram100_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram100_reserved0_BITS                         20
#define BG_DCTRAM_dctram100_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram100 :: DATA [11:00] */
#define BG_DCTRAM_dctram100_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram100_DATA_ALIGN                             0
#define BG_DCTRAM_dctram100_DATA_BITS                              12
#define BG_DCTRAM_dctram100_DATA_SHIFT                             0

/***************************************************************************
 *dctram101 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram101 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram101_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram101_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram101_reserved0_BITS                         20
#define BG_DCTRAM_dctram101_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram101 :: DATA [11:00] */
#define BG_DCTRAM_dctram101_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram101_DATA_ALIGN                             0
#define BG_DCTRAM_dctram101_DATA_BITS                              12
#define BG_DCTRAM_dctram101_DATA_SHIFT                             0

/***************************************************************************
 *dctram102 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram102 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram102_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram102_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram102_reserved0_BITS                         20
#define BG_DCTRAM_dctram102_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram102 :: DATA [11:00] */
#define BG_DCTRAM_dctram102_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram102_DATA_ALIGN                             0
#define BG_DCTRAM_dctram102_DATA_BITS                              12
#define BG_DCTRAM_dctram102_DATA_SHIFT                             0

/***************************************************************************
 *dctram103 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram103 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram103_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram103_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram103_reserved0_BITS                         20
#define BG_DCTRAM_dctram103_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram103 :: DATA [11:00] */
#define BG_DCTRAM_dctram103_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram103_DATA_ALIGN                             0
#define BG_DCTRAM_dctram103_DATA_BITS                              12
#define BG_DCTRAM_dctram103_DATA_SHIFT                             0

/***************************************************************************
 *dctram104 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram104 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram104_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram104_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram104_reserved0_BITS                         20
#define BG_DCTRAM_dctram104_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram104 :: DATA [11:00] */
#define BG_DCTRAM_dctram104_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram104_DATA_ALIGN                             0
#define BG_DCTRAM_dctram104_DATA_BITS                              12
#define BG_DCTRAM_dctram104_DATA_SHIFT                             0

/***************************************************************************
 *dctram105 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram105 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram105_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram105_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram105_reserved0_BITS                         20
#define BG_DCTRAM_dctram105_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram105 :: DATA [11:00] */
#define BG_DCTRAM_dctram105_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram105_DATA_ALIGN                             0
#define BG_DCTRAM_dctram105_DATA_BITS                              12
#define BG_DCTRAM_dctram105_DATA_SHIFT                             0

/***************************************************************************
 *dctram106 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram106 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram106_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram106_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram106_reserved0_BITS                         20
#define BG_DCTRAM_dctram106_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram106 :: DATA [11:00] */
#define BG_DCTRAM_dctram106_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram106_DATA_ALIGN                             0
#define BG_DCTRAM_dctram106_DATA_BITS                              12
#define BG_DCTRAM_dctram106_DATA_SHIFT                             0

/***************************************************************************
 *dctram107 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram107 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram107_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram107_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram107_reserved0_BITS                         20
#define BG_DCTRAM_dctram107_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram107 :: DATA [11:00] */
#define BG_DCTRAM_dctram107_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram107_DATA_ALIGN                             0
#define BG_DCTRAM_dctram107_DATA_BITS                              12
#define BG_DCTRAM_dctram107_DATA_SHIFT                             0

/***************************************************************************
 *dctram108 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram108 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram108_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram108_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram108_reserved0_BITS                         20
#define BG_DCTRAM_dctram108_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram108 :: DATA [11:00] */
#define BG_DCTRAM_dctram108_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram108_DATA_ALIGN                             0
#define BG_DCTRAM_dctram108_DATA_BITS                              12
#define BG_DCTRAM_dctram108_DATA_SHIFT                             0

/***************************************************************************
 *dctram109 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram109 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram109_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram109_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram109_reserved0_BITS                         20
#define BG_DCTRAM_dctram109_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram109 :: DATA [11:00] */
#define BG_DCTRAM_dctram109_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram109_DATA_ALIGN                             0
#define BG_DCTRAM_dctram109_DATA_BITS                              12
#define BG_DCTRAM_dctram109_DATA_SHIFT                             0

/***************************************************************************
 *dctram110 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram110 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram110_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram110_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram110_reserved0_BITS                         20
#define BG_DCTRAM_dctram110_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram110 :: DATA [11:00] */
#define BG_DCTRAM_dctram110_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram110_DATA_ALIGN                             0
#define BG_DCTRAM_dctram110_DATA_BITS                              12
#define BG_DCTRAM_dctram110_DATA_SHIFT                             0

/***************************************************************************
 *dctram111 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram111 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram111_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram111_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram111_reserved0_BITS                         20
#define BG_DCTRAM_dctram111_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram111 :: DATA [11:00] */
#define BG_DCTRAM_dctram111_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram111_DATA_ALIGN                             0
#define BG_DCTRAM_dctram111_DATA_BITS                              12
#define BG_DCTRAM_dctram111_DATA_SHIFT                             0

/***************************************************************************
 *dctram112 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram112 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram112_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram112_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram112_reserved0_BITS                         20
#define BG_DCTRAM_dctram112_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram112 :: DATA [11:00] */
#define BG_DCTRAM_dctram112_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram112_DATA_ALIGN                             0
#define BG_DCTRAM_dctram112_DATA_BITS                              12
#define BG_DCTRAM_dctram112_DATA_SHIFT                             0

/***************************************************************************
 *dctram113 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram113 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram113_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram113_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram113_reserved0_BITS                         20
#define BG_DCTRAM_dctram113_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram113 :: DATA [11:00] */
#define BG_DCTRAM_dctram113_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram113_DATA_ALIGN                             0
#define BG_DCTRAM_dctram113_DATA_BITS                              12
#define BG_DCTRAM_dctram113_DATA_SHIFT                             0

/***************************************************************************
 *dctram114 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram114 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram114_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram114_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram114_reserved0_BITS                         20
#define BG_DCTRAM_dctram114_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram114 :: DATA [11:00] */
#define BG_DCTRAM_dctram114_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram114_DATA_ALIGN                             0
#define BG_DCTRAM_dctram114_DATA_BITS                              12
#define BG_DCTRAM_dctram114_DATA_SHIFT                             0

/***************************************************************************
 *dctram115 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram115 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram115_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram115_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram115_reserved0_BITS                         20
#define BG_DCTRAM_dctram115_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram115 :: DATA [11:00] */
#define BG_DCTRAM_dctram115_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram115_DATA_ALIGN                             0
#define BG_DCTRAM_dctram115_DATA_BITS                              12
#define BG_DCTRAM_dctram115_DATA_SHIFT                             0

/***************************************************************************
 *dctram116 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram116 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram116_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram116_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram116_reserved0_BITS                         20
#define BG_DCTRAM_dctram116_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram116 :: DATA [11:00] */
#define BG_DCTRAM_dctram116_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram116_DATA_ALIGN                             0
#define BG_DCTRAM_dctram116_DATA_BITS                              12
#define BG_DCTRAM_dctram116_DATA_SHIFT                             0

/***************************************************************************
 *dctram117 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram117 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram117_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram117_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram117_reserved0_BITS                         20
#define BG_DCTRAM_dctram117_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram117 :: DATA [11:00] */
#define BG_DCTRAM_dctram117_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram117_DATA_ALIGN                             0
#define BG_DCTRAM_dctram117_DATA_BITS                              12
#define BG_DCTRAM_dctram117_DATA_SHIFT                             0

/***************************************************************************
 *dctram118 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram118 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram118_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram118_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram118_reserved0_BITS                         20
#define BG_DCTRAM_dctram118_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram118 :: DATA [11:00] */
#define BG_DCTRAM_dctram118_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram118_DATA_ALIGN                             0
#define BG_DCTRAM_dctram118_DATA_BITS                              12
#define BG_DCTRAM_dctram118_DATA_SHIFT                             0

/***************************************************************************
 *dctram119 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram119 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram119_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram119_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram119_reserved0_BITS                         20
#define BG_DCTRAM_dctram119_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram119 :: DATA [11:00] */
#define BG_DCTRAM_dctram119_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram119_DATA_ALIGN                             0
#define BG_DCTRAM_dctram119_DATA_BITS                              12
#define BG_DCTRAM_dctram119_DATA_SHIFT                             0

/***************************************************************************
 *dctram120 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram120 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram120_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram120_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram120_reserved0_BITS                         20
#define BG_DCTRAM_dctram120_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram120 :: DATA [11:00] */
#define BG_DCTRAM_dctram120_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram120_DATA_ALIGN                             0
#define BG_DCTRAM_dctram120_DATA_BITS                              12
#define BG_DCTRAM_dctram120_DATA_SHIFT                             0

/***************************************************************************
 *dctram121 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram121 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram121_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram121_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram121_reserved0_BITS                         20
#define BG_DCTRAM_dctram121_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram121 :: DATA [11:00] */
#define BG_DCTRAM_dctram121_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram121_DATA_ALIGN                             0
#define BG_DCTRAM_dctram121_DATA_BITS                              12
#define BG_DCTRAM_dctram121_DATA_SHIFT                             0

/***************************************************************************
 *dctram122 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram122 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram122_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram122_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram122_reserved0_BITS                         20
#define BG_DCTRAM_dctram122_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram122 :: DATA [11:00] */
#define BG_DCTRAM_dctram122_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram122_DATA_ALIGN                             0
#define BG_DCTRAM_dctram122_DATA_BITS                              12
#define BG_DCTRAM_dctram122_DATA_SHIFT                             0

/***************************************************************************
 *dctram123 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram123 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram123_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram123_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram123_reserved0_BITS                         20
#define BG_DCTRAM_dctram123_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram123 :: DATA [11:00] */
#define BG_DCTRAM_dctram123_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram123_DATA_ALIGN                             0
#define BG_DCTRAM_dctram123_DATA_BITS                              12
#define BG_DCTRAM_dctram123_DATA_SHIFT                             0

/***************************************************************************
 *dctram124 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram124 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram124_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram124_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram124_reserved0_BITS                         20
#define BG_DCTRAM_dctram124_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram124 :: DATA [11:00] */
#define BG_DCTRAM_dctram124_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram124_DATA_ALIGN                             0
#define BG_DCTRAM_dctram124_DATA_BITS                              12
#define BG_DCTRAM_dctram124_DATA_SHIFT                             0

/***************************************************************************
 *dctram125 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram125 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram125_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram125_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram125_reserved0_BITS                         20
#define BG_DCTRAM_dctram125_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram125 :: DATA [11:00] */
#define BG_DCTRAM_dctram125_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram125_DATA_ALIGN                             0
#define BG_DCTRAM_dctram125_DATA_BITS                              12
#define BG_DCTRAM_dctram125_DATA_SHIFT                             0

/***************************************************************************
 *dctram126 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram126 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram126_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram126_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram126_reserved0_BITS                         20
#define BG_DCTRAM_dctram126_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram126 :: DATA [11:00] */
#define BG_DCTRAM_dctram126_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram126_DATA_ALIGN                             0
#define BG_DCTRAM_dctram126_DATA_BITS                              12
#define BG_DCTRAM_dctram126_DATA_SHIFT                             0

/***************************************************************************
 *dctram127 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram127 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram127_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram127_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram127_reserved0_BITS                         20
#define BG_DCTRAM_dctram127_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram127 :: DATA [11:00] */
#define BG_DCTRAM_dctram127_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram127_DATA_ALIGN                             0
#define BG_DCTRAM_dctram127_DATA_BITS                              12
#define BG_DCTRAM_dctram127_DATA_SHIFT                             0

/***************************************************************************
 *dctram128 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram128 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram128_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram128_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram128_reserved0_BITS                         20
#define BG_DCTRAM_dctram128_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram128 :: DATA [11:00] */
#define BG_DCTRAM_dctram128_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram128_DATA_ALIGN                             0
#define BG_DCTRAM_dctram128_DATA_BITS                              12
#define BG_DCTRAM_dctram128_DATA_SHIFT                             0

/***************************************************************************
 *dctram129 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram129 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram129_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram129_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram129_reserved0_BITS                         20
#define BG_DCTRAM_dctram129_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram129 :: DATA [11:00] */
#define BG_DCTRAM_dctram129_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram129_DATA_ALIGN                             0
#define BG_DCTRAM_dctram129_DATA_BITS                              12
#define BG_DCTRAM_dctram129_DATA_SHIFT                             0

/***************************************************************************
 *dctram130 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram130 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram130_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram130_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram130_reserved0_BITS                         20
#define BG_DCTRAM_dctram130_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram130 :: DATA [11:00] */
#define BG_DCTRAM_dctram130_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram130_DATA_ALIGN                             0
#define BG_DCTRAM_dctram130_DATA_BITS                              12
#define BG_DCTRAM_dctram130_DATA_SHIFT                             0

/***************************************************************************
 *dctram131 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram131 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram131_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram131_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram131_reserved0_BITS                         20
#define BG_DCTRAM_dctram131_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram131 :: DATA [11:00] */
#define BG_DCTRAM_dctram131_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram131_DATA_ALIGN                             0
#define BG_DCTRAM_dctram131_DATA_BITS                              12
#define BG_DCTRAM_dctram131_DATA_SHIFT                             0

/***************************************************************************
 *dctram132 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram132 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram132_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram132_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram132_reserved0_BITS                         20
#define BG_DCTRAM_dctram132_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram132 :: DATA [11:00] */
#define BG_DCTRAM_dctram132_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram132_DATA_ALIGN                             0
#define BG_DCTRAM_dctram132_DATA_BITS                              12
#define BG_DCTRAM_dctram132_DATA_SHIFT                             0

/***************************************************************************
 *dctram133 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram133 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram133_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram133_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram133_reserved0_BITS                         20
#define BG_DCTRAM_dctram133_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram133 :: DATA [11:00] */
#define BG_DCTRAM_dctram133_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram133_DATA_ALIGN                             0
#define BG_DCTRAM_dctram133_DATA_BITS                              12
#define BG_DCTRAM_dctram133_DATA_SHIFT                             0

/***************************************************************************
 *dctram134 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram134 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram134_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram134_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram134_reserved0_BITS                         20
#define BG_DCTRAM_dctram134_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram134 :: DATA [11:00] */
#define BG_DCTRAM_dctram134_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram134_DATA_ALIGN                             0
#define BG_DCTRAM_dctram134_DATA_BITS                              12
#define BG_DCTRAM_dctram134_DATA_SHIFT                             0

/***************************************************************************
 *dctram135 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram135 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram135_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram135_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram135_reserved0_BITS                         20
#define BG_DCTRAM_dctram135_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram135 :: DATA [11:00] */
#define BG_DCTRAM_dctram135_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram135_DATA_ALIGN                             0
#define BG_DCTRAM_dctram135_DATA_BITS                              12
#define BG_DCTRAM_dctram135_DATA_SHIFT                             0

/***************************************************************************
 *dctram136 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram136 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram136_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram136_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram136_reserved0_BITS                         20
#define BG_DCTRAM_dctram136_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram136 :: DATA [11:00] */
#define BG_DCTRAM_dctram136_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram136_DATA_ALIGN                             0
#define BG_DCTRAM_dctram136_DATA_BITS                              12
#define BG_DCTRAM_dctram136_DATA_SHIFT                             0

/***************************************************************************
 *dctram137 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram137 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram137_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram137_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram137_reserved0_BITS                         20
#define BG_DCTRAM_dctram137_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram137 :: DATA [11:00] */
#define BG_DCTRAM_dctram137_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram137_DATA_ALIGN                             0
#define BG_DCTRAM_dctram137_DATA_BITS                              12
#define BG_DCTRAM_dctram137_DATA_SHIFT                             0

/***************************************************************************
 *dctram138 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram138 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram138_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram138_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram138_reserved0_BITS                         20
#define BG_DCTRAM_dctram138_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram138 :: DATA [11:00] */
#define BG_DCTRAM_dctram138_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram138_DATA_ALIGN                             0
#define BG_DCTRAM_dctram138_DATA_BITS                              12
#define BG_DCTRAM_dctram138_DATA_SHIFT                             0

/***************************************************************************
 *dctram139 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram139 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram139_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram139_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram139_reserved0_BITS                         20
#define BG_DCTRAM_dctram139_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram139 :: DATA [11:00] */
#define BG_DCTRAM_dctram139_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram139_DATA_ALIGN                             0
#define BG_DCTRAM_dctram139_DATA_BITS                              12
#define BG_DCTRAM_dctram139_DATA_SHIFT                             0

/***************************************************************************
 *dctram140 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram140 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram140_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram140_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram140_reserved0_BITS                         20
#define BG_DCTRAM_dctram140_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram140 :: DATA [11:00] */
#define BG_DCTRAM_dctram140_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram140_DATA_ALIGN                             0
#define BG_DCTRAM_dctram140_DATA_BITS                              12
#define BG_DCTRAM_dctram140_DATA_SHIFT                             0

/***************************************************************************
 *dctram141 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram141 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram141_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram141_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram141_reserved0_BITS                         20
#define BG_DCTRAM_dctram141_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram141 :: DATA [11:00] */
#define BG_DCTRAM_dctram141_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram141_DATA_ALIGN                             0
#define BG_DCTRAM_dctram141_DATA_BITS                              12
#define BG_DCTRAM_dctram141_DATA_SHIFT                             0

/***************************************************************************
 *dctram142 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram142 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram142_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram142_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram142_reserved0_BITS                         20
#define BG_DCTRAM_dctram142_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram142 :: DATA [11:00] */
#define BG_DCTRAM_dctram142_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram142_DATA_ALIGN                             0
#define BG_DCTRAM_dctram142_DATA_BITS                              12
#define BG_DCTRAM_dctram142_DATA_SHIFT                             0

/***************************************************************************
 *dctram143 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram143 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram143_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram143_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram143_reserved0_BITS                         20
#define BG_DCTRAM_dctram143_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram143 :: DATA [11:00] */
#define BG_DCTRAM_dctram143_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram143_DATA_ALIGN                             0
#define BG_DCTRAM_dctram143_DATA_BITS                              12
#define BG_DCTRAM_dctram143_DATA_SHIFT                             0

/***************************************************************************
 *dctram144 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram144 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram144_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram144_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram144_reserved0_BITS                         20
#define BG_DCTRAM_dctram144_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram144 :: DATA [11:00] */
#define BG_DCTRAM_dctram144_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram144_DATA_ALIGN                             0
#define BG_DCTRAM_dctram144_DATA_BITS                              12
#define BG_DCTRAM_dctram144_DATA_SHIFT                             0

/***************************************************************************
 *dctram145 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram145 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram145_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram145_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram145_reserved0_BITS                         20
#define BG_DCTRAM_dctram145_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram145 :: DATA [11:00] */
#define BG_DCTRAM_dctram145_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram145_DATA_ALIGN                             0
#define BG_DCTRAM_dctram145_DATA_BITS                              12
#define BG_DCTRAM_dctram145_DATA_SHIFT                             0

/***************************************************************************
 *dctram146 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram146 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram146_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram146_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram146_reserved0_BITS                         20
#define BG_DCTRAM_dctram146_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram146 :: DATA [11:00] */
#define BG_DCTRAM_dctram146_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram146_DATA_ALIGN                             0
#define BG_DCTRAM_dctram146_DATA_BITS                              12
#define BG_DCTRAM_dctram146_DATA_SHIFT                             0

/***************************************************************************
 *dctram147 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram147 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram147_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram147_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram147_reserved0_BITS                         20
#define BG_DCTRAM_dctram147_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram147 :: DATA [11:00] */
#define BG_DCTRAM_dctram147_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram147_DATA_ALIGN                             0
#define BG_DCTRAM_dctram147_DATA_BITS                              12
#define BG_DCTRAM_dctram147_DATA_SHIFT                             0

/***************************************************************************
 *dctram148 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram148 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram148_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram148_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram148_reserved0_BITS                         20
#define BG_DCTRAM_dctram148_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram148 :: DATA [11:00] */
#define BG_DCTRAM_dctram148_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram148_DATA_ALIGN                             0
#define BG_DCTRAM_dctram148_DATA_BITS                              12
#define BG_DCTRAM_dctram148_DATA_SHIFT                             0

/***************************************************************************
 *dctram149 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram149 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram149_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram149_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram149_reserved0_BITS                         20
#define BG_DCTRAM_dctram149_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram149 :: DATA [11:00] */
#define BG_DCTRAM_dctram149_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram149_DATA_ALIGN                             0
#define BG_DCTRAM_dctram149_DATA_BITS                              12
#define BG_DCTRAM_dctram149_DATA_SHIFT                             0

/***************************************************************************
 *dctram150 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram150 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram150_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram150_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram150_reserved0_BITS                         20
#define BG_DCTRAM_dctram150_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram150 :: DATA [11:00] */
#define BG_DCTRAM_dctram150_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram150_DATA_ALIGN                             0
#define BG_DCTRAM_dctram150_DATA_BITS                              12
#define BG_DCTRAM_dctram150_DATA_SHIFT                             0

/***************************************************************************
 *dctram151 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram151 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram151_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram151_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram151_reserved0_BITS                         20
#define BG_DCTRAM_dctram151_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram151 :: DATA [11:00] */
#define BG_DCTRAM_dctram151_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram151_DATA_ALIGN                             0
#define BG_DCTRAM_dctram151_DATA_BITS                              12
#define BG_DCTRAM_dctram151_DATA_SHIFT                             0

/***************************************************************************
 *dctram152 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram152 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram152_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram152_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram152_reserved0_BITS                         20
#define BG_DCTRAM_dctram152_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram152 :: DATA [11:00] */
#define BG_DCTRAM_dctram152_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram152_DATA_ALIGN                             0
#define BG_DCTRAM_dctram152_DATA_BITS                              12
#define BG_DCTRAM_dctram152_DATA_SHIFT                             0

/***************************************************************************
 *dctram153 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram153 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram153_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram153_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram153_reserved0_BITS                         20
#define BG_DCTRAM_dctram153_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram153 :: DATA [11:00] */
#define BG_DCTRAM_dctram153_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram153_DATA_ALIGN                             0
#define BG_DCTRAM_dctram153_DATA_BITS                              12
#define BG_DCTRAM_dctram153_DATA_SHIFT                             0

/***************************************************************************
 *dctram154 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram154 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram154_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram154_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram154_reserved0_BITS                         20
#define BG_DCTRAM_dctram154_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram154 :: DATA [11:00] */
#define BG_DCTRAM_dctram154_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram154_DATA_ALIGN                             0
#define BG_DCTRAM_dctram154_DATA_BITS                              12
#define BG_DCTRAM_dctram154_DATA_SHIFT                             0

/***************************************************************************
 *dctram155 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram155 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram155_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram155_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram155_reserved0_BITS                         20
#define BG_DCTRAM_dctram155_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram155 :: DATA [11:00] */
#define BG_DCTRAM_dctram155_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram155_DATA_ALIGN                             0
#define BG_DCTRAM_dctram155_DATA_BITS                              12
#define BG_DCTRAM_dctram155_DATA_SHIFT                             0

/***************************************************************************
 *dctram156 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram156 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram156_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram156_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram156_reserved0_BITS                         20
#define BG_DCTRAM_dctram156_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram156 :: DATA [11:00] */
#define BG_DCTRAM_dctram156_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram156_DATA_ALIGN                             0
#define BG_DCTRAM_dctram156_DATA_BITS                              12
#define BG_DCTRAM_dctram156_DATA_SHIFT                             0

/***************************************************************************
 *dctram157 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram157 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram157_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram157_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram157_reserved0_BITS                         20
#define BG_DCTRAM_dctram157_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram157 :: DATA [11:00] */
#define BG_DCTRAM_dctram157_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram157_DATA_ALIGN                             0
#define BG_DCTRAM_dctram157_DATA_BITS                              12
#define BG_DCTRAM_dctram157_DATA_SHIFT                             0

/***************************************************************************
 *dctram158 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram158 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram158_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram158_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram158_reserved0_BITS                         20
#define BG_DCTRAM_dctram158_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram158 :: DATA [11:00] */
#define BG_DCTRAM_dctram158_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram158_DATA_ALIGN                             0
#define BG_DCTRAM_dctram158_DATA_BITS                              12
#define BG_DCTRAM_dctram158_DATA_SHIFT                             0

/***************************************************************************
 *dctram159 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram159 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram159_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram159_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram159_reserved0_BITS                         20
#define BG_DCTRAM_dctram159_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram159 :: DATA [11:00] */
#define BG_DCTRAM_dctram159_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram159_DATA_ALIGN                             0
#define BG_DCTRAM_dctram159_DATA_BITS                              12
#define BG_DCTRAM_dctram159_DATA_SHIFT                             0

/***************************************************************************
 *dctram160 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram160 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram160_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram160_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram160_reserved0_BITS                         20
#define BG_DCTRAM_dctram160_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram160 :: DATA [11:00] */
#define BG_DCTRAM_dctram160_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram160_DATA_ALIGN                             0
#define BG_DCTRAM_dctram160_DATA_BITS                              12
#define BG_DCTRAM_dctram160_DATA_SHIFT                             0

/***************************************************************************
 *dctram161 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram161 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram161_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram161_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram161_reserved0_BITS                         20
#define BG_DCTRAM_dctram161_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram161 :: DATA [11:00] */
#define BG_DCTRAM_dctram161_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram161_DATA_ALIGN                             0
#define BG_DCTRAM_dctram161_DATA_BITS                              12
#define BG_DCTRAM_dctram161_DATA_SHIFT                             0

/***************************************************************************
 *dctram162 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram162 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram162_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram162_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram162_reserved0_BITS                         20
#define BG_DCTRAM_dctram162_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram162 :: DATA [11:00] */
#define BG_DCTRAM_dctram162_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram162_DATA_ALIGN                             0
#define BG_DCTRAM_dctram162_DATA_BITS                              12
#define BG_DCTRAM_dctram162_DATA_SHIFT                             0

/***************************************************************************
 *dctram163 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram163 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram163_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram163_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram163_reserved0_BITS                         20
#define BG_DCTRAM_dctram163_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram163 :: DATA [11:00] */
#define BG_DCTRAM_dctram163_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram163_DATA_ALIGN                             0
#define BG_DCTRAM_dctram163_DATA_BITS                              12
#define BG_DCTRAM_dctram163_DATA_SHIFT                             0

/***************************************************************************
 *dctram164 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram164 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram164_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram164_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram164_reserved0_BITS                         20
#define BG_DCTRAM_dctram164_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram164 :: DATA [11:00] */
#define BG_DCTRAM_dctram164_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram164_DATA_ALIGN                             0
#define BG_DCTRAM_dctram164_DATA_BITS                              12
#define BG_DCTRAM_dctram164_DATA_SHIFT                             0

/***************************************************************************
 *dctram165 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram165 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram165_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram165_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram165_reserved0_BITS                         20
#define BG_DCTRAM_dctram165_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram165 :: DATA [11:00] */
#define BG_DCTRAM_dctram165_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram165_DATA_ALIGN                             0
#define BG_DCTRAM_dctram165_DATA_BITS                              12
#define BG_DCTRAM_dctram165_DATA_SHIFT                             0

/***************************************************************************
 *dctram166 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram166 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram166_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram166_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram166_reserved0_BITS                         20
#define BG_DCTRAM_dctram166_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram166 :: DATA [11:00] */
#define BG_DCTRAM_dctram166_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram166_DATA_ALIGN                             0
#define BG_DCTRAM_dctram166_DATA_BITS                              12
#define BG_DCTRAM_dctram166_DATA_SHIFT                             0

/***************************************************************************
 *dctram167 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram167 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram167_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram167_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram167_reserved0_BITS                         20
#define BG_DCTRAM_dctram167_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram167 :: DATA [11:00] */
#define BG_DCTRAM_dctram167_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram167_DATA_ALIGN                             0
#define BG_DCTRAM_dctram167_DATA_BITS                              12
#define BG_DCTRAM_dctram167_DATA_SHIFT                             0

/***************************************************************************
 *dctram168 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram168 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram168_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram168_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram168_reserved0_BITS                         20
#define BG_DCTRAM_dctram168_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram168 :: DATA [11:00] */
#define BG_DCTRAM_dctram168_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram168_DATA_ALIGN                             0
#define BG_DCTRAM_dctram168_DATA_BITS                              12
#define BG_DCTRAM_dctram168_DATA_SHIFT                             0

/***************************************************************************
 *dctram169 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram169 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram169_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram169_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram169_reserved0_BITS                         20
#define BG_DCTRAM_dctram169_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram169 :: DATA [11:00] */
#define BG_DCTRAM_dctram169_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram169_DATA_ALIGN                             0
#define BG_DCTRAM_dctram169_DATA_BITS                              12
#define BG_DCTRAM_dctram169_DATA_SHIFT                             0

/***************************************************************************
 *dctram170 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram170 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram170_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram170_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram170_reserved0_BITS                         20
#define BG_DCTRAM_dctram170_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram170 :: DATA [11:00] */
#define BG_DCTRAM_dctram170_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram170_DATA_ALIGN                             0
#define BG_DCTRAM_dctram170_DATA_BITS                              12
#define BG_DCTRAM_dctram170_DATA_SHIFT                             0

/***************************************************************************
 *dctram171 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram171 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram171_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram171_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram171_reserved0_BITS                         20
#define BG_DCTRAM_dctram171_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram171 :: DATA [11:00] */
#define BG_DCTRAM_dctram171_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram171_DATA_ALIGN                             0
#define BG_DCTRAM_dctram171_DATA_BITS                              12
#define BG_DCTRAM_dctram171_DATA_SHIFT                             0

/***************************************************************************
 *dctram172 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram172 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram172_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram172_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram172_reserved0_BITS                         20
#define BG_DCTRAM_dctram172_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram172 :: DATA [11:00] */
#define BG_DCTRAM_dctram172_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram172_DATA_ALIGN                             0
#define BG_DCTRAM_dctram172_DATA_BITS                              12
#define BG_DCTRAM_dctram172_DATA_SHIFT                             0

/***************************************************************************
 *dctram173 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram173 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram173_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram173_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram173_reserved0_BITS                         20
#define BG_DCTRAM_dctram173_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram173 :: DATA [11:00] */
#define BG_DCTRAM_dctram173_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram173_DATA_ALIGN                             0
#define BG_DCTRAM_dctram173_DATA_BITS                              12
#define BG_DCTRAM_dctram173_DATA_SHIFT                             0

/***************************************************************************
 *dctram174 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram174 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram174_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram174_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram174_reserved0_BITS                         20
#define BG_DCTRAM_dctram174_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram174 :: DATA [11:00] */
#define BG_DCTRAM_dctram174_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram174_DATA_ALIGN                             0
#define BG_DCTRAM_dctram174_DATA_BITS                              12
#define BG_DCTRAM_dctram174_DATA_SHIFT                             0

/***************************************************************************
 *dctram175 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram175 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram175_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram175_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram175_reserved0_BITS                         20
#define BG_DCTRAM_dctram175_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram175 :: DATA [11:00] */
#define BG_DCTRAM_dctram175_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram175_DATA_ALIGN                             0
#define BG_DCTRAM_dctram175_DATA_BITS                              12
#define BG_DCTRAM_dctram175_DATA_SHIFT                             0

/***************************************************************************
 *dctram176 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram176 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram176_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram176_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram176_reserved0_BITS                         20
#define BG_DCTRAM_dctram176_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram176 :: DATA [11:00] */
#define BG_DCTRAM_dctram176_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram176_DATA_ALIGN                             0
#define BG_DCTRAM_dctram176_DATA_BITS                              12
#define BG_DCTRAM_dctram176_DATA_SHIFT                             0

/***************************************************************************
 *dctram177 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram177 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram177_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram177_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram177_reserved0_BITS                         20
#define BG_DCTRAM_dctram177_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram177 :: DATA [11:00] */
#define BG_DCTRAM_dctram177_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram177_DATA_ALIGN                             0
#define BG_DCTRAM_dctram177_DATA_BITS                              12
#define BG_DCTRAM_dctram177_DATA_SHIFT                             0

/***************************************************************************
 *dctram178 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram178 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram178_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram178_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram178_reserved0_BITS                         20
#define BG_DCTRAM_dctram178_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram178 :: DATA [11:00] */
#define BG_DCTRAM_dctram178_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram178_DATA_ALIGN                             0
#define BG_DCTRAM_dctram178_DATA_BITS                              12
#define BG_DCTRAM_dctram178_DATA_SHIFT                             0

/***************************************************************************
 *dctram179 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram179 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram179_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram179_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram179_reserved0_BITS                         20
#define BG_DCTRAM_dctram179_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram179 :: DATA [11:00] */
#define BG_DCTRAM_dctram179_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram179_DATA_ALIGN                             0
#define BG_DCTRAM_dctram179_DATA_BITS                              12
#define BG_DCTRAM_dctram179_DATA_SHIFT                             0

/***************************************************************************
 *dctram180 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram180 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram180_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram180_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram180_reserved0_BITS                         20
#define BG_DCTRAM_dctram180_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram180 :: DATA [11:00] */
#define BG_DCTRAM_dctram180_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram180_DATA_ALIGN                             0
#define BG_DCTRAM_dctram180_DATA_BITS                              12
#define BG_DCTRAM_dctram180_DATA_SHIFT                             0

/***************************************************************************
 *dctram181 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram181 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram181_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram181_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram181_reserved0_BITS                         20
#define BG_DCTRAM_dctram181_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram181 :: DATA [11:00] */
#define BG_DCTRAM_dctram181_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram181_DATA_ALIGN                             0
#define BG_DCTRAM_dctram181_DATA_BITS                              12
#define BG_DCTRAM_dctram181_DATA_SHIFT                             0

/***************************************************************************
 *dctram182 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram182 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram182_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram182_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram182_reserved0_BITS                         20
#define BG_DCTRAM_dctram182_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram182 :: DATA [11:00] */
#define BG_DCTRAM_dctram182_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram182_DATA_ALIGN                             0
#define BG_DCTRAM_dctram182_DATA_BITS                              12
#define BG_DCTRAM_dctram182_DATA_SHIFT                             0

/***************************************************************************
 *dctram183 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram183 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram183_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram183_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram183_reserved0_BITS                         20
#define BG_DCTRAM_dctram183_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram183 :: DATA [11:00] */
#define BG_DCTRAM_dctram183_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram183_DATA_ALIGN                             0
#define BG_DCTRAM_dctram183_DATA_BITS                              12
#define BG_DCTRAM_dctram183_DATA_SHIFT                             0

/***************************************************************************
 *dctram184 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram184 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram184_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram184_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram184_reserved0_BITS                         20
#define BG_DCTRAM_dctram184_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram184 :: DATA [11:00] */
#define BG_DCTRAM_dctram184_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram184_DATA_ALIGN                             0
#define BG_DCTRAM_dctram184_DATA_BITS                              12
#define BG_DCTRAM_dctram184_DATA_SHIFT                             0

/***************************************************************************
 *dctram185 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram185 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram185_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram185_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram185_reserved0_BITS                         20
#define BG_DCTRAM_dctram185_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram185 :: DATA [11:00] */
#define BG_DCTRAM_dctram185_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram185_DATA_ALIGN                             0
#define BG_DCTRAM_dctram185_DATA_BITS                              12
#define BG_DCTRAM_dctram185_DATA_SHIFT                             0

/***************************************************************************
 *dctram186 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram186 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram186_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram186_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram186_reserved0_BITS                         20
#define BG_DCTRAM_dctram186_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram186 :: DATA [11:00] */
#define BG_DCTRAM_dctram186_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram186_DATA_ALIGN                             0
#define BG_DCTRAM_dctram186_DATA_BITS                              12
#define BG_DCTRAM_dctram186_DATA_SHIFT                             0

/***************************************************************************
 *dctram187 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram187 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram187_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram187_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram187_reserved0_BITS                         20
#define BG_DCTRAM_dctram187_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram187 :: DATA [11:00] */
#define BG_DCTRAM_dctram187_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram187_DATA_ALIGN                             0
#define BG_DCTRAM_dctram187_DATA_BITS                              12
#define BG_DCTRAM_dctram187_DATA_SHIFT                             0

/***************************************************************************
 *dctram188 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram188 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram188_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram188_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram188_reserved0_BITS                         20
#define BG_DCTRAM_dctram188_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram188 :: DATA [11:00] */
#define BG_DCTRAM_dctram188_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram188_DATA_ALIGN                             0
#define BG_DCTRAM_dctram188_DATA_BITS                              12
#define BG_DCTRAM_dctram188_DATA_SHIFT                             0

/***************************************************************************
 *dctram189 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram189 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram189_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram189_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram189_reserved0_BITS                         20
#define BG_DCTRAM_dctram189_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram189 :: DATA [11:00] */
#define BG_DCTRAM_dctram189_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram189_DATA_ALIGN                             0
#define BG_DCTRAM_dctram189_DATA_BITS                              12
#define BG_DCTRAM_dctram189_DATA_SHIFT                             0

/***************************************************************************
 *dctram190 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram190 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram190_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram190_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram190_reserved0_BITS                         20
#define BG_DCTRAM_dctram190_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram190 :: DATA [11:00] */
#define BG_DCTRAM_dctram190_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram190_DATA_ALIGN                             0
#define BG_DCTRAM_dctram190_DATA_BITS                              12
#define BG_DCTRAM_dctram190_DATA_SHIFT                             0

/***************************************************************************
 *dctram191 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram191 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram191_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram191_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram191_reserved0_BITS                         20
#define BG_DCTRAM_dctram191_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram191 :: DATA [11:00] */
#define BG_DCTRAM_dctram191_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram191_DATA_ALIGN                             0
#define BG_DCTRAM_dctram191_DATA_BITS                              12
#define BG_DCTRAM_dctram191_DATA_SHIFT                             0

/***************************************************************************
 *dctram192 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram192 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram192_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram192_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram192_reserved0_BITS                         20
#define BG_DCTRAM_dctram192_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram192 :: DATA [11:00] */
#define BG_DCTRAM_dctram192_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram192_DATA_ALIGN                             0
#define BG_DCTRAM_dctram192_DATA_BITS                              12
#define BG_DCTRAM_dctram192_DATA_SHIFT                             0

/***************************************************************************
 *dctram193 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram193 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram193_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram193_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram193_reserved0_BITS                         20
#define BG_DCTRAM_dctram193_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram193 :: DATA [11:00] */
#define BG_DCTRAM_dctram193_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram193_DATA_ALIGN                             0
#define BG_DCTRAM_dctram193_DATA_BITS                              12
#define BG_DCTRAM_dctram193_DATA_SHIFT                             0

/***************************************************************************
 *dctram194 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram194 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram194_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram194_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram194_reserved0_BITS                         20
#define BG_DCTRAM_dctram194_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram194 :: DATA [11:00] */
#define BG_DCTRAM_dctram194_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram194_DATA_ALIGN                             0
#define BG_DCTRAM_dctram194_DATA_BITS                              12
#define BG_DCTRAM_dctram194_DATA_SHIFT                             0

/***************************************************************************
 *dctram195 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram195 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram195_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram195_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram195_reserved0_BITS                         20
#define BG_DCTRAM_dctram195_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram195 :: DATA [11:00] */
#define BG_DCTRAM_dctram195_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram195_DATA_ALIGN                             0
#define BG_DCTRAM_dctram195_DATA_BITS                              12
#define BG_DCTRAM_dctram195_DATA_SHIFT                             0

/***************************************************************************
 *dctram196 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram196 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram196_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram196_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram196_reserved0_BITS                         20
#define BG_DCTRAM_dctram196_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram196 :: DATA [11:00] */
#define BG_DCTRAM_dctram196_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram196_DATA_ALIGN                             0
#define BG_DCTRAM_dctram196_DATA_BITS                              12
#define BG_DCTRAM_dctram196_DATA_SHIFT                             0

/***************************************************************************
 *dctram197 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram197 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram197_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram197_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram197_reserved0_BITS                         20
#define BG_DCTRAM_dctram197_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram197 :: DATA [11:00] */
#define BG_DCTRAM_dctram197_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram197_DATA_ALIGN                             0
#define BG_DCTRAM_dctram197_DATA_BITS                              12
#define BG_DCTRAM_dctram197_DATA_SHIFT                             0

/***************************************************************************
 *dctram198 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram198 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram198_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram198_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram198_reserved0_BITS                         20
#define BG_DCTRAM_dctram198_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram198 :: DATA [11:00] */
#define BG_DCTRAM_dctram198_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram198_DATA_ALIGN                             0
#define BG_DCTRAM_dctram198_DATA_BITS                              12
#define BG_DCTRAM_dctram198_DATA_SHIFT                             0

/***************************************************************************
 *dctram199 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram199 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram199_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram199_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram199_reserved0_BITS                         20
#define BG_DCTRAM_dctram199_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram199 :: DATA [11:00] */
#define BG_DCTRAM_dctram199_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram199_DATA_ALIGN                             0
#define BG_DCTRAM_dctram199_DATA_BITS                              12
#define BG_DCTRAM_dctram199_DATA_SHIFT                             0

/***************************************************************************
 *dctram200 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram200 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram200_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram200_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram200_reserved0_BITS                         20
#define BG_DCTRAM_dctram200_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram200 :: DATA [11:00] */
#define BG_DCTRAM_dctram200_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram200_DATA_ALIGN                             0
#define BG_DCTRAM_dctram200_DATA_BITS                              12
#define BG_DCTRAM_dctram200_DATA_SHIFT                             0

/***************************************************************************
 *dctram201 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram201 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram201_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram201_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram201_reserved0_BITS                         20
#define BG_DCTRAM_dctram201_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram201 :: DATA [11:00] */
#define BG_DCTRAM_dctram201_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram201_DATA_ALIGN                             0
#define BG_DCTRAM_dctram201_DATA_BITS                              12
#define BG_DCTRAM_dctram201_DATA_SHIFT                             0

/***************************************************************************
 *dctram202 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram202 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram202_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram202_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram202_reserved0_BITS                         20
#define BG_DCTRAM_dctram202_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram202 :: DATA [11:00] */
#define BG_DCTRAM_dctram202_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram202_DATA_ALIGN                             0
#define BG_DCTRAM_dctram202_DATA_BITS                              12
#define BG_DCTRAM_dctram202_DATA_SHIFT                             0

/***************************************************************************
 *dctram203 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram203 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram203_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram203_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram203_reserved0_BITS                         20
#define BG_DCTRAM_dctram203_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram203 :: DATA [11:00] */
#define BG_DCTRAM_dctram203_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram203_DATA_ALIGN                             0
#define BG_DCTRAM_dctram203_DATA_BITS                              12
#define BG_DCTRAM_dctram203_DATA_SHIFT                             0

/***************************************************************************
 *dctram204 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram204 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram204_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram204_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram204_reserved0_BITS                         20
#define BG_DCTRAM_dctram204_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram204 :: DATA [11:00] */
#define BG_DCTRAM_dctram204_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram204_DATA_ALIGN                             0
#define BG_DCTRAM_dctram204_DATA_BITS                              12
#define BG_DCTRAM_dctram204_DATA_SHIFT                             0

/***************************************************************************
 *dctram205 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram205 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram205_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram205_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram205_reserved0_BITS                         20
#define BG_DCTRAM_dctram205_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram205 :: DATA [11:00] */
#define BG_DCTRAM_dctram205_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram205_DATA_ALIGN                             0
#define BG_DCTRAM_dctram205_DATA_BITS                              12
#define BG_DCTRAM_dctram205_DATA_SHIFT                             0

/***************************************************************************
 *dctram206 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram206 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram206_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram206_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram206_reserved0_BITS                         20
#define BG_DCTRAM_dctram206_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram206 :: DATA [11:00] */
#define BG_DCTRAM_dctram206_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram206_DATA_ALIGN                             0
#define BG_DCTRAM_dctram206_DATA_BITS                              12
#define BG_DCTRAM_dctram206_DATA_SHIFT                             0

/***************************************************************************
 *dctram207 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram207 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram207_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram207_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram207_reserved0_BITS                         20
#define BG_DCTRAM_dctram207_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram207 :: DATA [11:00] */
#define BG_DCTRAM_dctram207_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram207_DATA_ALIGN                             0
#define BG_DCTRAM_dctram207_DATA_BITS                              12
#define BG_DCTRAM_dctram207_DATA_SHIFT                             0

/***************************************************************************
 *dctram208 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram208 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram208_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram208_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram208_reserved0_BITS                         20
#define BG_DCTRAM_dctram208_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram208 :: DATA [11:00] */
#define BG_DCTRAM_dctram208_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram208_DATA_ALIGN                             0
#define BG_DCTRAM_dctram208_DATA_BITS                              12
#define BG_DCTRAM_dctram208_DATA_SHIFT                             0

/***************************************************************************
 *dctram209 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram209 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram209_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram209_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram209_reserved0_BITS                         20
#define BG_DCTRAM_dctram209_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram209 :: DATA [11:00] */
#define BG_DCTRAM_dctram209_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram209_DATA_ALIGN                             0
#define BG_DCTRAM_dctram209_DATA_BITS                              12
#define BG_DCTRAM_dctram209_DATA_SHIFT                             0

/***************************************************************************
 *dctram210 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram210 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram210_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram210_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram210_reserved0_BITS                         20
#define BG_DCTRAM_dctram210_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram210 :: DATA [11:00] */
#define BG_DCTRAM_dctram210_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram210_DATA_ALIGN                             0
#define BG_DCTRAM_dctram210_DATA_BITS                              12
#define BG_DCTRAM_dctram210_DATA_SHIFT                             0

/***************************************************************************
 *dctram211 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram211 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram211_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram211_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram211_reserved0_BITS                         20
#define BG_DCTRAM_dctram211_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram211 :: DATA [11:00] */
#define BG_DCTRAM_dctram211_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram211_DATA_ALIGN                             0
#define BG_DCTRAM_dctram211_DATA_BITS                              12
#define BG_DCTRAM_dctram211_DATA_SHIFT                             0

/***************************************************************************
 *dctram212 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram212 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram212_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram212_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram212_reserved0_BITS                         20
#define BG_DCTRAM_dctram212_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram212 :: DATA [11:00] */
#define BG_DCTRAM_dctram212_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram212_DATA_ALIGN                             0
#define BG_DCTRAM_dctram212_DATA_BITS                              12
#define BG_DCTRAM_dctram212_DATA_SHIFT                             0

/***************************************************************************
 *dctram213 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram213 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram213_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram213_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram213_reserved0_BITS                         20
#define BG_DCTRAM_dctram213_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram213 :: DATA [11:00] */
#define BG_DCTRAM_dctram213_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram213_DATA_ALIGN                             0
#define BG_DCTRAM_dctram213_DATA_BITS                              12
#define BG_DCTRAM_dctram213_DATA_SHIFT                             0

/***************************************************************************
 *dctram214 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram214 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram214_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram214_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram214_reserved0_BITS                         20
#define BG_DCTRAM_dctram214_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram214 :: DATA [11:00] */
#define BG_DCTRAM_dctram214_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram214_DATA_ALIGN                             0
#define BG_DCTRAM_dctram214_DATA_BITS                              12
#define BG_DCTRAM_dctram214_DATA_SHIFT                             0

/***************************************************************************
 *dctram215 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram215 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram215_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram215_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram215_reserved0_BITS                         20
#define BG_DCTRAM_dctram215_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram215 :: DATA [11:00] */
#define BG_DCTRAM_dctram215_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram215_DATA_ALIGN                             0
#define BG_DCTRAM_dctram215_DATA_BITS                              12
#define BG_DCTRAM_dctram215_DATA_SHIFT                             0

/***************************************************************************
 *dctram216 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram216 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram216_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram216_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram216_reserved0_BITS                         20
#define BG_DCTRAM_dctram216_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram216 :: DATA [11:00] */
#define BG_DCTRAM_dctram216_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram216_DATA_ALIGN                             0
#define BG_DCTRAM_dctram216_DATA_BITS                              12
#define BG_DCTRAM_dctram216_DATA_SHIFT                             0

/***************************************************************************
 *dctram217 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram217 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram217_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram217_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram217_reserved0_BITS                         20
#define BG_DCTRAM_dctram217_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram217 :: DATA [11:00] */
#define BG_DCTRAM_dctram217_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram217_DATA_ALIGN                             0
#define BG_DCTRAM_dctram217_DATA_BITS                              12
#define BG_DCTRAM_dctram217_DATA_SHIFT                             0

/***************************************************************************
 *dctram218 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram218 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram218_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram218_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram218_reserved0_BITS                         20
#define BG_DCTRAM_dctram218_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram218 :: DATA [11:00] */
#define BG_DCTRAM_dctram218_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram218_DATA_ALIGN                             0
#define BG_DCTRAM_dctram218_DATA_BITS                              12
#define BG_DCTRAM_dctram218_DATA_SHIFT                             0

/***************************************************************************
 *dctram219 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram219 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram219_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram219_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram219_reserved0_BITS                         20
#define BG_DCTRAM_dctram219_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram219 :: DATA [11:00] */
#define BG_DCTRAM_dctram219_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram219_DATA_ALIGN                             0
#define BG_DCTRAM_dctram219_DATA_BITS                              12
#define BG_DCTRAM_dctram219_DATA_SHIFT                             0

/***************************************************************************
 *dctram220 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram220 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram220_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram220_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram220_reserved0_BITS                         20
#define BG_DCTRAM_dctram220_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram220 :: DATA [11:00] */
#define BG_DCTRAM_dctram220_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram220_DATA_ALIGN                             0
#define BG_DCTRAM_dctram220_DATA_BITS                              12
#define BG_DCTRAM_dctram220_DATA_SHIFT                             0

/***************************************************************************
 *dctram221 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram221 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram221_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram221_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram221_reserved0_BITS                         20
#define BG_DCTRAM_dctram221_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram221 :: DATA [11:00] */
#define BG_DCTRAM_dctram221_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram221_DATA_ALIGN                             0
#define BG_DCTRAM_dctram221_DATA_BITS                              12
#define BG_DCTRAM_dctram221_DATA_SHIFT                             0

/***************************************************************************
 *dctram222 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram222 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram222_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram222_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram222_reserved0_BITS                         20
#define BG_DCTRAM_dctram222_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram222 :: DATA [11:00] */
#define BG_DCTRAM_dctram222_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram222_DATA_ALIGN                             0
#define BG_DCTRAM_dctram222_DATA_BITS                              12
#define BG_DCTRAM_dctram222_DATA_SHIFT                             0

/***************************************************************************
 *dctram223 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram223 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram223_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram223_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram223_reserved0_BITS                         20
#define BG_DCTRAM_dctram223_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram223 :: DATA [11:00] */
#define BG_DCTRAM_dctram223_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram223_DATA_ALIGN                             0
#define BG_DCTRAM_dctram223_DATA_BITS                              12
#define BG_DCTRAM_dctram223_DATA_SHIFT                             0

/***************************************************************************
 *dctram224 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram224 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram224_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram224_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram224_reserved0_BITS                         20
#define BG_DCTRAM_dctram224_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram224 :: DATA [11:00] */
#define BG_DCTRAM_dctram224_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram224_DATA_ALIGN                             0
#define BG_DCTRAM_dctram224_DATA_BITS                              12
#define BG_DCTRAM_dctram224_DATA_SHIFT                             0

/***************************************************************************
 *dctram225 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram225 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram225_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram225_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram225_reserved0_BITS                         20
#define BG_DCTRAM_dctram225_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram225 :: DATA [11:00] */
#define BG_DCTRAM_dctram225_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram225_DATA_ALIGN                             0
#define BG_DCTRAM_dctram225_DATA_BITS                              12
#define BG_DCTRAM_dctram225_DATA_SHIFT                             0

/***************************************************************************
 *dctram226 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram226 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram226_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram226_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram226_reserved0_BITS                         20
#define BG_DCTRAM_dctram226_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram226 :: DATA [11:00] */
#define BG_DCTRAM_dctram226_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram226_DATA_ALIGN                             0
#define BG_DCTRAM_dctram226_DATA_BITS                              12
#define BG_DCTRAM_dctram226_DATA_SHIFT                             0

/***************************************************************************
 *dctram227 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram227 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram227_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram227_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram227_reserved0_BITS                         20
#define BG_DCTRAM_dctram227_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram227 :: DATA [11:00] */
#define BG_DCTRAM_dctram227_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram227_DATA_ALIGN                             0
#define BG_DCTRAM_dctram227_DATA_BITS                              12
#define BG_DCTRAM_dctram227_DATA_SHIFT                             0

/***************************************************************************
 *dctram228 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram228 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram228_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram228_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram228_reserved0_BITS                         20
#define BG_DCTRAM_dctram228_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram228 :: DATA [11:00] */
#define BG_DCTRAM_dctram228_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram228_DATA_ALIGN                             0
#define BG_DCTRAM_dctram228_DATA_BITS                              12
#define BG_DCTRAM_dctram228_DATA_SHIFT                             0

/***************************************************************************
 *dctram229 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram229 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram229_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram229_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram229_reserved0_BITS                         20
#define BG_DCTRAM_dctram229_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram229 :: DATA [11:00] */
#define BG_DCTRAM_dctram229_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram229_DATA_ALIGN                             0
#define BG_DCTRAM_dctram229_DATA_BITS                              12
#define BG_DCTRAM_dctram229_DATA_SHIFT                             0

/***************************************************************************
 *dctram230 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram230 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram230_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram230_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram230_reserved0_BITS                         20
#define BG_DCTRAM_dctram230_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram230 :: DATA [11:00] */
#define BG_DCTRAM_dctram230_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram230_DATA_ALIGN                             0
#define BG_DCTRAM_dctram230_DATA_BITS                              12
#define BG_DCTRAM_dctram230_DATA_SHIFT                             0

/***************************************************************************
 *dctram231 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram231 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram231_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram231_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram231_reserved0_BITS                         20
#define BG_DCTRAM_dctram231_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram231 :: DATA [11:00] */
#define BG_DCTRAM_dctram231_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram231_DATA_ALIGN                             0
#define BG_DCTRAM_dctram231_DATA_BITS                              12
#define BG_DCTRAM_dctram231_DATA_SHIFT                             0

/***************************************************************************
 *dctram232 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram232 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram232_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram232_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram232_reserved0_BITS                         20
#define BG_DCTRAM_dctram232_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram232 :: DATA [11:00] */
#define BG_DCTRAM_dctram232_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram232_DATA_ALIGN                             0
#define BG_DCTRAM_dctram232_DATA_BITS                              12
#define BG_DCTRAM_dctram232_DATA_SHIFT                             0

/***************************************************************************
 *dctram233 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram233 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram233_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram233_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram233_reserved0_BITS                         20
#define BG_DCTRAM_dctram233_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram233 :: DATA [11:00] */
#define BG_DCTRAM_dctram233_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram233_DATA_ALIGN                             0
#define BG_DCTRAM_dctram233_DATA_BITS                              12
#define BG_DCTRAM_dctram233_DATA_SHIFT                             0

/***************************************************************************
 *dctram234 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram234 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram234_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram234_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram234_reserved0_BITS                         20
#define BG_DCTRAM_dctram234_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram234 :: DATA [11:00] */
#define BG_DCTRAM_dctram234_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram234_DATA_ALIGN                             0
#define BG_DCTRAM_dctram234_DATA_BITS                              12
#define BG_DCTRAM_dctram234_DATA_SHIFT                             0

/***************************************************************************
 *dctram235 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram235 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram235_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram235_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram235_reserved0_BITS                         20
#define BG_DCTRAM_dctram235_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram235 :: DATA [11:00] */
#define BG_DCTRAM_dctram235_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram235_DATA_ALIGN                             0
#define BG_DCTRAM_dctram235_DATA_BITS                              12
#define BG_DCTRAM_dctram235_DATA_SHIFT                             0

/***************************************************************************
 *dctram236 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram236 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram236_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram236_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram236_reserved0_BITS                         20
#define BG_DCTRAM_dctram236_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram236 :: DATA [11:00] */
#define BG_DCTRAM_dctram236_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram236_DATA_ALIGN                             0
#define BG_DCTRAM_dctram236_DATA_BITS                              12
#define BG_DCTRAM_dctram236_DATA_SHIFT                             0

/***************************************************************************
 *dctram237 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram237 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram237_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram237_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram237_reserved0_BITS                         20
#define BG_DCTRAM_dctram237_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram237 :: DATA [11:00] */
#define BG_DCTRAM_dctram237_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram237_DATA_ALIGN                             0
#define BG_DCTRAM_dctram237_DATA_BITS                              12
#define BG_DCTRAM_dctram237_DATA_SHIFT                             0

/***************************************************************************
 *dctram238 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram238 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram238_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram238_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram238_reserved0_BITS                         20
#define BG_DCTRAM_dctram238_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram238 :: DATA [11:00] */
#define BG_DCTRAM_dctram238_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram238_DATA_ALIGN                             0
#define BG_DCTRAM_dctram238_DATA_BITS                              12
#define BG_DCTRAM_dctram238_DATA_SHIFT                             0

/***************************************************************************
 *dctram239 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram239 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram239_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram239_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram239_reserved0_BITS                         20
#define BG_DCTRAM_dctram239_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram239 :: DATA [11:00] */
#define BG_DCTRAM_dctram239_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram239_DATA_ALIGN                             0
#define BG_DCTRAM_dctram239_DATA_BITS                              12
#define BG_DCTRAM_dctram239_DATA_SHIFT                             0

/***************************************************************************
 *dctram240 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram240 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram240_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram240_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram240_reserved0_BITS                         20
#define BG_DCTRAM_dctram240_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram240 :: DATA [11:00] */
#define BG_DCTRAM_dctram240_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram240_DATA_ALIGN                             0
#define BG_DCTRAM_dctram240_DATA_BITS                              12
#define BG_DCTRAM_dctram240_DATA_SHIFT                             0

/***************************************************************************
 *dctram241 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram241 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram241_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram241_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram241_reserved0_BITS                         20
#define BG_DCTRAM_dctram241_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram241 :: DATA [11:00] */
#define BG_DCTRAM_dctram241_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram241_DATA_ALIGN                             0
#define BG_DCTRAM_dctram241_DATA_BITS                              12
#define BG_DCTRAM_dctram241_DATA_SHIFT                             0

/***************************************************************************
 *dctram242 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram242 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram242_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram242_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram242_reserved0_BITS                         20
#define BG_DCTRAM_dctram242_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram242 :: DATA [11:00] */
#define BG_DCTRAM_dctram242_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram242_DATA_ALIGN                             0
#define BG_DCTRAM_dctram242_DATA_BITS                              12
#define BG_DCTRAM_dctram242_DATA_SHIFT                             0

/***************************************************************************
 *dctram243 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram243 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram243_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram243_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram243_reserved0_BITS                         20
#define BG_DCTRAM_dctram243_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram243 :: DATA [11:00] */
#define BG_DCTRAM_dctram243_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram243_DATA_ALIGN                             0
#define BG_DCTRAM_dctram243_DATA_BITS                              12
#define BG_DCTRAM_dctram243_DATA_SHIFT                             0

/***************************************************************************
 *dctram244 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram244 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram244_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram244_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram244_reserved0_BITS                         20
#define BG_DCTRAM_dctram244_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram244 :: DATA [11:00] */
#define BG_DCTRAM_dctram244_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram244_DATA_ALIGN                             0
#define BG_DCTRAM_dctram244_DATA_BITS                              12
#define BG_DCTRAM_dctram244_DATA_SHIFT                             0

/***************************************************************************
 *dctram245 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram245 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram245_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram245_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram245_reserved0_BITS                         20
#define BG_DCTRAM_dctram245_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram245 :: DATA [11:00] */
#define BG_DCTRAM_dctram245_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram245_DATA_ALIGN                             0
#define BG_DCTRAM_dctram245_DATA_BITS                              12
#define BG_DCTRAM_dctram245_DATA_SHIFT                             0

/***************************************************************************
 *dctram246 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram246 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram246_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram246_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram246_reserved0_BITS                         20
#define BG_DCTRAM_dctram246_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram246 :: DATA [11:00] */
#define BG_DCTRAM_dctram246_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram246_DATA_ALIGN                             0
#define BG_DCTRAM_dctram246_DATA_BITS                              12
#define BG_DCTRAM_dctram246_DATA_SHIFT                             0

/***************************************************************************
 *dctram247 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram247 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram247_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram247_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram247_reserved0_BITS                         20
#define BG_DCTRAM_dctram247_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram247 :: DATA [11:00] */
#define BG_DCTRAM_dctram247_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram247_DATA_ALIGN                             0
#define BG_DCTRAM_dctram247_DATA_BITS                              12
#define BG_DCTRAM_dctram247_DATA_SHIFT                             0

/***************************************************************************
 *dctram248 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram248 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram248_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram248_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram248_reserved0_BITS                         20
#define BG_DCTRAM_dctram248_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram248 :: DATA [11:00] */
#define BG_DCTRAM_dctram248_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram248_DATA_ALIGN                             0
#define BG_DCTRAM_dctram248_DATA_BITS                              12
#define BG_DCTRAM_dctram248_DATA_SHIFT                             0

/***************************************************************************
 *dctram249 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram249 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram249_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram249_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram249_reserved0_BITS                         20
#define BG_DCTRAM_dctram249_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram249 :: DATA [11:00] */
#define BG_DCTRAM_dctram249_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram249_DATA_ALIGN                             0
#define BG_DCTRAM_dctram249_DATA_BITS                              12
#define BG_DCTRAM_dctram249_DATA_SHIFT                             0

/***************************************************************************
 *dctram250 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram250 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram250_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram250_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram250_reserved0_BITS                         20
#define BG_DCTRAM_dctram250_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram250 :: DATA [11:00] */
#define BG_DCTRAM_dctram250_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram250_DATA_ALIGN                             0
#define BG_DCTRAM_dctram250_DATA_BITS                              12
#define BG_DCTRAM_dctram250_DATA_SHIFT                             0

/***************************************************************************
 *dctram251 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram251 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram251_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram251_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram251_reserved0_BITS                         20
#define BG_DCTRAM_dctram251_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram251 :: DATA [11:00] */
#define BG_DCTRAM_dctram251_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram251_DATA_ALIGN                             0
#define BG_DCTRAM_dctram251_DATA_BITS                              12
#define BG_DCTRAM_dctram251_DATA_SHIFT                             0

/***************************************************************************
 *dctram252 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram252 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram252_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram252_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram252_reserved0_BITS                         20
#define BG_DCTRAM_dctram252_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram252 :: DATA [11:00] */
#define BG_DCTRAM_dctram252_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram252_DATA_ALIGN                             0
#define BG_DCTRAM_dctram252_DATA_BITS                              12
#define BG_DCTRAM_dctram252_DATA_SHIFT                             0

/***************************************************************************
 *dctram253 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram253 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram253_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram253_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram253_reserved0_BITS                         20
#define BG_DCTRAM_dctram253_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram253 :: DATA [11:00] */
#define BG_DCTRAM_dctram253_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram253_DATA_ALIGN                             0
#define BG_DCTRAM_dctram253_DATA_BITS                              12
#define BG_DCTRAM_dctram253_DATA_SHIFT                             0

/***************************************************************************
 *dctram254 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram254 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram254_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram254_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram254_reserved0_BITS                         20
#define BG_DCTRAM_dctram254_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram254 :: DATA [11:00] */
#define BG_DCTRAM_dctram254_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram254_DATA_ALIGN                             0
#define BG_DCTRAM_dctram254_DATA_BITS                              12
#define BG_DCTRAM_dctram254_DATA_SHIFT                             0

/***************************************************************************
 *dctram255 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram255 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram255_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram255_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram255_reserved0_BITS                         20
#define BG_DCTRAM_dctram255_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram255 :: DATA [11:00] */
#define BG_DCTRAM_dctram255_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram255_DATA_ALIGN                             0
#define BG_DCTRAM_dctram255_DATA_BITS                              12
#define BG_DCTRAM_dctram255_DATA_SHIFT                             0

/***************************************************************************
 *dctram256 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram256 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram256_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram256_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram256_reserved0_BITS                         20
#define BG_DCTRAM_dctram256_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram256 :: DATA [11:00] */
#define BG_DCTRAM_dctram256_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram256_DATA_ALIGN                             0
#define BG_DCTRAM_dctram256_DATA_BITS                              12
#define BG_DCTRAM_dctram256_DATA_SHIFT                             0

/***************************************************************************
 *dctram257 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram257 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram257_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram257_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram257_reserved0_BITS                         20
#define BG_DCTRAM_dctram257_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram257 :: DATA [11:00] */
#define BG_DCTRAM_dctram257_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram257_DATA_ALIGN                             0
#define BG_DCTRAM_dctram257_DATA_BITS                              12
#define BG_DCTRAM_dctram257_DATA_SHIFT                             0

/***************************************************************************
 *dctram258 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram258 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram258_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram258_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram258_reserved0_BITS                         20
#define BG_DCTRAM_dctram258_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram258 :: DATA [11:00] */
#define BG_DCTRAM_dctram258_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram258_DATA_ALIGN                             0
#define BG_DCTRAM_dctram258_DATA_BITS                              12
#define BG_DCTRAM_dctram258_DATA_SHIFT                             0

/***************************************************************************
 *dctram259 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram259 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram259_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram259_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram259_reserved0_BITS                         20
#define BG_DCTRAM_dctram259_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram259 :: DATA [11:00] */
#define BG_DCTRAM_dctram259_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram259_DATA_ALIGN                             0
#define BG_DCTRAM_dctram259_DATA_BITS                              12
#define BG_DCTRAM_dctram259_DATA_SHIFT                             0

/***************************************************************************
 *dctram260 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram260 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram260_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram260_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram260_reserved0_BITS                         20
#define BG_DCTRAM_dctram260_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram260 :: DATA [11:00] */
#define BG_DCTRAM_dctram260_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram260_DATA_ALIGN                             0
#define BG_DCTRAM_dctram260_DATA_BITS                              12
#define BG_DCTRAM_dctram260_DATA_SHIFT                             0

/***************************************************************************
 *dctram261 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram261 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram261_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram261_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram261_reserved0_BITS                         20
#define BG_DCTRAM_dctram261_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram261 :: DATA [11:00] */
#define BG_DCTRAM_dctram261_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram261_DATA_ALIGN                             0
#define BG_DCTRAM_dctram261_DATA_BITS                              12
#define BG_DCTRAM_dctram261_DATA_SHIFT                             0

/***************************************************************************
 *dctram262 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram262 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram262_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram262_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram262_reserved0_BITS                         20
#define BG_DCTRAM_dctram262_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram262 :: DATA [11:00] */
#define BG_DCTRAM_dctram262_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram262_DATA_ALIGN                             0
#define BG_DCTRAM_dctram262_DATA_BITS                              12
#define BG_DCTRAM_dctram262_DATA_SHIFT                             0

/***************************************************************************
 *dctram263 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram263 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram263_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram263_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram263_reserved0_BITS                         20
#define BG_DCTRAM_dctram263_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram263 :: DATA [11:00] */
#define BG_DCTRAM_dctram263_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram263_DATA_ALIGN                             0
#define BG_DCTRAM_dctram263_DATA_BITS                              12
#define BG_DCTRAM_dctram263_DATA_SHIFT                             0

/***************************************************************************
 *dctram264 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram264 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram264_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram264_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram264_reserved0_BITS                         20
#define BG_DCTRAM_dctram264_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram264 :: DATA [11:00] */
#define BG_DCTRAM_dctram264_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram264_DATA_ALIGN                             0
#define BG_DCTRAM_dctram264_DATA_BITS                              12
#define BG_DCTRAM_dctram264_DATA_SHIFT                             0

/***************************************************************************
 *dctram265 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram265 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram265_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram265_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram265_reserved0_BITS                         20
#define BG_DCTRAM_dctram265_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram265 :: DATA [11:00] */
#define BG_DCTRAM_dctram265_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram265_DATA_ALIGN                             0
#define BG_DCTRAM_dctram265_DATA_BITS                              12
#define BG_DCTRAM_dctram265_DATA_SHIFT                             0

/***************************************************************************
 *dctram266 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram266 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram266_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram266_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram266_reserved0_BITS                         20
#define BG_DCTRAM_dctram266_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram266 :: DATA [11:00] */
#define BG_DCTRAM_dctram266_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram266_DATA_ALIGN                             0
#define BG_DCTRAM_dctram266_DATA_BITS                              12
#define BG_DCTRAM_dctram266_DATA_SHIFT                             0

/***************************************************************************
 *dctram267 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram267 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram267_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram267_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram267_reserved0_BITS                         20
#define BG_DCTRAM_dctram267_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram267 :: DATA [11:00] */
#define BG_DCTRAM_dctram267_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram267_DATA_ALIGN                             0
#define BG_DCTRAM_dctram267_DATA_BITS                              12
#define BG_DCTRAM_dctram267_DATA_SHIFT                             0

/***************************************************************************
 *dctram268 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram268 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram268_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram268_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram268_reserved0_BITS                         20
#define BG_DCTRAM_dctram268_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram268 :: DATA [11:00] */
#define BG_DCTRAM_dctram268_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram268_DATA_ALIGN                             0
#define BG_DCTRAM_dctram268_DATA_BITS                              12
#define BG_DCTRAM_dctram268_DATA_SHIFT                             0

/***************************************************************************
 *dctram269 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram269 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram269_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram269_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram269_reserved0_BITS                         20
#define BG_DCTRAM_dctram269_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram269 :: DATA [11:00] */
#define BG_DCTRAM_dctram269_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram269_DATA_ALIGN                             0
#define BG_DCTRAM_dctram269_DATA_BITS                              12
#define BG_DCTRAM_dctram269_DATA_SHIFT                             0

/***************************************************************************
 *dctram270 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram270 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram270_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram270_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram270_reserved0_BITS                         20
#define BG_DCTRAM_dctram270_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram270 :: DATA [11:00] */
#define BG_DCTRAM_dctram270_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram270_DATA_ALIGN                             0
#define BG_DCTRAM_dctram270_DATA_BITS                              12
#define BG_DCTRAM_dctram270_DATA_SHIFT                             0

/***************************************************************************
 *dctram271 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram271 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram271_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram271_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram271_reserved0_BITS                         20
#define BG_DCTRAM_dctram271_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram271 :: DATA [11:00] */
#define BG_DCTRAM_dctram271_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram271_DATA_ALIGN                             0
#define BG_DCTRAM_dctram271_DATA_BITS                              12
#define BG_DCTRAM_dctram271_DATA_SHIFT                             0

/***************************************************************************
 *dctram272 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram272 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram272_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram272_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram272_reserved0_BITS                         20
#define BG_DCTRAM_dctram272_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram272 :: DATA [11:00] */
#define BG_DCTRAM_dctram272_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram272_DATA_ALIGN                             0
#define BG_DCTRAM_dctram272_DATA_BITS                              12
#define BG_DCTRAM_dctram272_DATA_SHIFT                             0

/***************************************************************************
 *dctram273 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram273 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram273_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram273_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram273_reserved0_BITS                         20
#define BG_DCTRAM_dctram273_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram273 :: DATA [11:00] */
#define BG_DCTRAM_dctram273_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram273_DATA_ALIGN                             0
#define BG_DCTRAM_dctram273_DATA_BITS                              12
#define BG_DCTRAM_dctram273_DATA_SHIFT                             0

/***************************************************************************
 *dctram274 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram274 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram274_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram274_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram274_reserved0_BITS                         20
#define BG_DCTRAM_dctram274_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram274 :: DATA [11:00] */
#define BG_DCTRAM_dctram274_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram274_DATA_ALIGN                             0
#define BG_DCTRAM_dctram274_DATA_BITS                              12
#define BG_DCTRAM_dctram274_DATA_SHIFT                             0

/***************************************************************************
 *dctram275 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram275 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram275_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram275_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram275_reserved0_BITS                         20
#define BG_DCTRAM_dctram275_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram275 :: DATA [11:00] */
#define BG_DCTRAM_dctram275_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram275_DATA_ALIGN                             0
#define BG_DCTRAM_dctram275_DATA_BITS                              12
#define BG_DCTRAM_dctram275_DATA_SHIFT                             0

/***************************************************************************
 *dctram276 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram276 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram276_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram276_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram276_reserved0_BITS                         20
#define BG_DCTRAM_dctram276_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram276 :: DATA [11:00] */
#define BG_DCTRAM_dctram276_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram276_DATA_ALIGN                             0
#define BG_DCTRAM_dctram276_DATA_BITS                              12
#define BG_DCTRAM_dctram276_DATA_SHIFT                             0

/***************************************************************************
 *dctram277 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram277 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram277_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram277_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram277_reserved0_BITS                         20
#define BG_DCTRAM_dctram277_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram277 :: DATA [11:00] */
#define BG_DCTRAM_dctram277_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram277_DATA_ALIGN                             0
#define BG_DCTRAM_dctram277_DATA_BITS                              12
#define BG_DCTRAM_dctram277_DATA_SHIFT                             0

/***************************************************************************
 *dctram278 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram278 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram278_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram278_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram278_reserved0_BITS                         20
#define BG_DCTRAM_dctram278_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram278 :: DATA [11:00] */
#define BG_DCTRAM_dctram278_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram278_DATA_ALIGN                             0
#define BG_DCTRAM_dctram278_DATA_BITS                              12
#define BG_DCTRAM_dctram278_DATA_SHIFT                             0

/***************************************************************************
 *dctram279 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram279 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram279_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram279_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram279_reserved0_BITS                         20
#define BG_DCTRAM_dctram279_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram279 :: DATA [11:00] */
#define BG_DCTRAM_dctram279_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram279_DATA_ALIGN                             0
#define BG_DCTRAM_dctram279_DATA_BITS                              12
#define BG_DCTRAM_dctram279_DATA_SHIFT                             0

/***************************************************************************
 *dctram280 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram280 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram280_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram280_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram280_reserved0_BITS                         20
#define BG_DCTRAM_dctram280_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram280 :: DATA [11:00] */
#define BG_DCTRAM_dctram280_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram280_DATA_ALIGN                             0
#define BG_DCTRAM_dctram280_DATA_BITS                              12
#define BG_DCTRAM_dctram280_DATA_SHIFT                             0

/***************************************************************************
 *dctram281 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram281 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram281_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram281_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram281_reserved0_BITS                         20
#define BG_DCTRAM_dctram281_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram281 :: DATA [11:00] */
#define BG_DCTRAM_dctram281_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram281_DATA_ALIGN                             0
#define BG_DCTRAM_dctram281_DATA_BITS                              12
#define BG_DCTRAM_dctram281_DATA_SHIFT                             0

/***************************************************************************
 *dctram282 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram282 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram282_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram282_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram282_reserved0_BITS                         20
#define BG_DCTRAM_dctram282_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram282 :: DATA [11:00] */
#define BG_DCTRAM_dctram282_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram282_DATA_ALIGN                             0
#define BG_DCTRAM_dctram282_DATA_BITS                              12
#define BG_DCTRAM_dctram282_DATA_SHIFT                             0

/***************************************************************************
 *dctram283 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram283 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram283_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram283_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram283_reserved0_BITS                         20
#define BG_DCTRAM_dctram283_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram283 :: DATA [11:00] */
#define BG_DCTRAM_dctram283_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram283_DATA_ALIGN                             0
#define BG_DCTRAM_dctram283_DATA_BITS                              12
#define BG_DCTRAM_dctram283_DATA_SHIFT                             0

/***************************************************************************
 *dctram284 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram284 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram284_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram284_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram284_reserved0_BITS                         20
#define BG_DCTRAM_dctram284_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram284 :: DATA [11:00] */
#define BG_DCTRAM_dctram284_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram284_DATA_ALIGN                             0
#define BG_DCTRAM_dctram284_DATA_BITS                              12
#define BG_DCTRAM_dctram284_DATA_SHIFT                             0

/***************************************************************************
 *dctram285 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram285 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram285_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram285_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram285_reserved0_BITS                         20
#define BG_DCTRAM_dctram285_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram285 :: DATA [11:00] */
#define BG_DCTRAM_dctram285_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram285_DATA_ALIGN                             0
#define BG_DCTRAM_dctram285_DATA_BITS                              12
#define BG_DCTRAM_dctram285_DATA_SHIFT                             0

/***************************************************************************
 *dctram286 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram286 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram286_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram286_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram286_reserved0_BITS                         20
#define BG_DCTRAM_dctram286_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram286 :: DATA [11:00] */
#define BG_DCTRAM_dctram286_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram286_DATA_ALIGN                             0
#define BG_DCTRAM_dctram286_DATA_BITS                              12
#define BG_DCTRAM_dctram286_DATA_SHIFT                             0

/***************************************************************************
 *dctram287 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram287 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram287_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram287_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram287_reserved0_BITS                         20
#define BG_DCTRAM_dctram287_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram287 :: DATA [11:00] */
#define BG_DCTRAM_dctram287_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram287_DATA_ALIGN                             0
#define BG_DCTRAM_dctram287_DATA_BITS                              12
#define BG_DCTRAM_dctram287_DATA_SHIFT                             0

/***************************************************************************
 *dctram288 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram288 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram288_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram288_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram288_reserved0_BITS                         20
#define BG_DCTRAM_dctram288_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram288 :: DATA [11:00] */
#define BG_DCTRAM_dctram288_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram288_DATA_ALIGN                             0
#define BG_DCTRAM_dctram288_DATA_BITS                              12
#define BG_DCTRAM_dctram288_DATA_SHIFT                             0

/***************************************************************************
 *dctram289 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram289 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram289_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram289_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram289_reserved0_BITS                         20
#define BG_DCTRAM_dctram289_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram289 :: DATA [11:00] */
#define BG_DCTRAM_dctram289_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram289_DATA_ALIGN                             0
#define BG_DCTRAM_dctram289_DATA_BITS                              12
#define BG_DCTRAM_dctram289_DATA_SHIFT                             0

/***************************************************************************
 *dctram290 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram290 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram290_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram290_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram290_reserved0_BITS                         20
#define BG_DCTRAM_dctram290_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram290 :: DATA [11:00] */
#define BG_DCTRAM_dctram290_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram290_DATA_ALIGN                             0
#define BG_DCTRAM_dctram290_DATA_BITS                              12
#define BG_DCTRAM_dctram290_DATA_SHIFT                             0

/***************************************************************************
 *dctram291 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram291 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram291_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram291_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram291_reserved0_BITS                         20
#define BG_DCTRAM_dctram291_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram291 :: DATA [11:00] */
#define BG_DCTRAM_dctram291_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram291_DATA_ALIGN                             0
#define BG_DCTRAM_dctram291_DATA_BITS                              12
#define BG_DCTRAM_dctram291_DATA_SHIFT                             0

/***************************************************************************
 *dctram292 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram292 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram292_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram292_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram292_reserved0_BITS                         20
#define BG_DCTRAM_dctram292_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram292 :: DATA [11:00] */
#define BG_DCTRAM_dctram292_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram292_DATA_ALIGN                             0
#define BG_DCTRAM_dctram292_DATA_BITS                              12
#define BG_DCTRAM_dctram292_DATA_SHIFT                             0

/***************************************************************************
 *dctram293 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram293 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram293_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram293_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram293_reserved0_BITS                         20
#define BG_DCTRAM_dctram293_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram293 :: DATA [11:00] */
#define BG_DCTRAM_dctram293_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram293_DATA_ALIGN                             0
#define BG_DCTRAM_dctram293_DATA_BITS                              12
#define BG_DCTRAM_dctram293_DATA_SHIFT                             0

/***************************************************************************
 *dctram294 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram294 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram294_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram294_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram294_reserved0_BITS                         20
#define BG_DCTRAM_dctram294_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram294 :: DATA [11:00] */
#define BG_DCTRAM_dctram294_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram294_DATA_ALIGN                             0
#define BG_DCTRAM_dctram294_DATA_BITS                              12
#define BG_DCTRAM_dctram294_DATA_SHIFT                             0

/***************************************************************************
 *dctram295 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram295 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram295_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram295_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram295_reserved0_BITS                         20
#define BG_DCTRAM_dctram295_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram295 :: DATA [11:00] */
#define BG_DCTRAM_dctram295_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram295_DATA_ALIGN                             0
#define BG_DCTRAM_dctram295_DATA_BITS                              12
#define BG_DCTRAM_dctram295_DATA_SHIFT                             0

/***************************************************************************
 *dctram296 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram296 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram296_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram296_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram296_reserved0_BITS                         20
#define BG_DCTRAM_dctram296_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram296 :: DATA [11:00] */
#define BG_DCTRAM_dctram296_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram296_DATA_ALIGN                             0
#define BG_DCTRAM_dctram296_DATA_BITS                              12
#define BG_DCTRAM_dctram296_DATA_SHIFT                             0

/***************************************************************************
 *dctram297 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram297 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram297_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram297_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram297_reserved0_BITS                         20
#define BG_DCTRAM_dctram297_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram297 :: DATA [11:00] */
#define BG_DCTRAM_dctram297_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram297_DATA_ALIGN                             0
#define BG_DCTRAM_dctram297_DATA_BITS                              12
#define BG_DCTRAM_dctram297_DATA_SHIFT                             0

/***************************************************************************
 *dctram298 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram298 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram298_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram298_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram298_reserved0_BITS                         20
#define BG_DCTRAM_dctram298_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram298 :: DATA [11:00] */
#define BG_DCTRAM_dctram298_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram298_DATA_ALIGN                             0
#define BG_DCTRAM_dctram298_DATA_BITS                              12
#define BG_DCTRAM_dctram298_DATA_SHIFT                             0

/***************************************************************************
 *dctram299 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram299 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram299_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram299_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram299_reserved0_BITS                         20
#define BG_DCTRAM_dctram299_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram299 :: DATA [11:00] */
#define BG_DCTRAM_dctram299_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram299_DATA_ALIGN                             0
#define BG_DCTRAM_dctram299_DATA_BITS                              12
#define BG_DCTRAM_dctram299_DATA_SHIFT                             0

/***************************************************************************
 *dctram300 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram300 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram300_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram300_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram300_reserved0_BITS                         20
#define BG_DCTRAM_dctram300_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram300 :: DATA [11:00] */
#define BG_DCTRAM_dctram300_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram300_DATA_ALIGN                             0
#define BG_DCTRAM_dctram300_DATA_BITS                              12
#define BG_DCTRAM_dctram300_DATA_SHIFT                             0

/***************************************************************************
 *dctram301 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram301 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram301_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram301_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram301_reserved0_BITS                         20
#define BG_DCTRAM_dctram301_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram301 :: DATA [11:00] */
#define BG_DCTRAM_dctram301_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram301_DATA_ALIGN                             0
#define BG_DCTRAM_dctram301_DATA_BITS                              12
#define BG_DCTRAM_dctram301_DATA_SHIFT                             0

/***************************************************************************
 *dctram302 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram302 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram302_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram302_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram302_reserved0_BITS                         20
#define BG_DCTRAM_dctram302_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram302 :: DATA [11:00] */
#define BG_DCTRAM_dctram302_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram302_DATA_ALIGN                             0
#define BG_DCTRAM_dctram302_DATA_BITS                              12
#define BG_DCTRAM_dctram302_DATA_SHIFT                             0

/***************************************************************************
 *dctram303 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram303 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram303_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram303_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram303_reserved0_BITS                         20
#define BG_DCTRAM_dctram303_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram303 :: DATA [11:00] */
#define BG_DCTRAM_dctram303_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram303_DATA_ALIGN                             0
#define BG_DCTRAM_dctram303_DATA_BITS                              12
#define BG_DCTRAM_dctram303_DATA_SHIFT                             0

/***************************************************************************
 *dctram304 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram304 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram304_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram304_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram304_reserved0_BITS                         20
#define BG_DCTRAM_dctram304_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram304 :: DATA [11:00] */
#define BG_DCTRAM_dctram304_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram304_DATA_ALIGN                             0
#define BG_DCTRAM_dctram304_DATA_BITS                              12
#define BG_DCTRAM_dctram304_DATA_SHIFT                             0

/***************************************************************************
 *dctram305 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram305 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram305_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram305_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram305_reserved0_BITS                         20
#define BG_DCTRAM_dctram305_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram305 :: DATA [11:00] */
#define BG_DCTRAM_dctram305_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram305_DATA_ALIGN                             0
#define BG_DCTRAM_dctram305_DATA_BITS                              12
#define BG_DCTRAM_dctram305_DATA_SHIFT                             0

/***************************************************************************
 *dctram306 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram306 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram306_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram306_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram306_reserved0_BITS                         20
#define BG_DCTRAM_dctram306_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram306 :: DATA [11:00] */
#define BG_DCTRAM_dctram306_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram306_DATA_ALIGN                             0
#define BG_DCTRAM_dctram306_DATA_BITS                              12
#define BG_DCTRAM_dctram306_DATA_SHIFT                             0

/***************************************************************************
 *dctram307 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram307 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram307_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram307_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram307_reserved0_BITS                         20
#define BG_DCTRAM_dctram307_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram307 :: DATA [11:00] */
#define BG_DCTRAM_dctram307_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram307_DATA_ALIGN                             0
#define BG_DCTRAM_dctram307_DATA_BITS                              12
#define BG_DCTRAM_dctram307_DATA_SHIFT                             0

/***************************************************************************
 *dctram308 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram308 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram308_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram308_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram308_reserved0_BITS                         20
#define BG_DCTRAM_dctram308_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram308 :: DATA [11:00] */
#define BG_DCTRAM_dctram308_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram308_DATA_ALIGN                             0
#define BG_DCTRAM_dctram308_DATA_BITS                              12
#define BG_DCTRAM_dctram308_DATA_SHIFT                             0

/***************************************************************************
 *dctram309 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram309 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram309_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram309_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram309_reserved0_BITS                         20
#define BG_DCTRAM_dctram309_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram309 :: DATA [11:00] */
#define BG_DCTRAM_dctram309_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram309_DATA_ALIGN                             0
#define BG_DCTRAM_dctram309_DATA_BITS                              12
#define BG_DCTRAM_dctram309_DATA_SHIFT                             0

/***************************************************************************
 *dctram310 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram310 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram310_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram310_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram310_reserved0_BITS                         20
#define BG_DCTRAM_dctram310_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram310 :: DATA [11:00] */
#define BG_DCTRAM_dctram310_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram310_DATA_ALIGN                             0
#define BG_DCTRAM_dctram310_DATA_BITS                              12
#define BG_DCTRAM_dctram310_DATA_SHIFT                             0

/***************************************************************************
 *dctram311 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram311 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram311_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram311_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram311_reserved0_BITS                         20
#define BG_DCTRAM_dctram311_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram311 :: DATA [11:00] */
#define BG_DCTRAM_dctram311_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram311_DATA_ALIGN                             0
#define BG_DCTRAM_dctram311_DATA_BITS                              12
#define BG_DCTRAM_dctram311_DATA_SHIFT                             0

/***************************************************************************
 *dctram312 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram312 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram312_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram312_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram312_reserved0_BITS                         20
#define BG_DCTRAM_dctram312_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram312 :: DATA [11:00] */
#define BG_DCTRAM_dctram312_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram312_DATA_ALIGN                             0
#define BG_DCTRAM_dctram312_DATA_BITS                              12
#define BG_DCTRAM_dctram312_DATA_SHIFT                             0

/***************************************************************************
 *dctram313 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram313 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram313_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram313_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram313_reserved0_BITS                         20
#define BG_DCTRAM_dctram313_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram313 :: DATA [11:00] */
#define BG_DCTRAM_dctram313_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram313_DATA_ALIGN                             0
#define BG_DCTRAM_dctram313_DATA_BITS                              12
#define BG_DCTRAM_dctram313_DATA_SHIFT                             0

/***************************************************************************
 *dctram314 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram314 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram314_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram314_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram314_reserved0_BITS                         20
#define BG_DCTRAM_dctram314_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram314 :: DATA [11:00] */
#define BG_DCTRAM_dctram314_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram314_DATA_ALIGN                             0
#define BG_DCTRAM_dctram314_DATA_BITS                              12
#define BG_DCTRAM_dctram314_DATA_SHIFT                             0

/***************************************************************************
 *dctram315 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram315 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram315_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram315_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram315_reserved0_BITS                         20
#define BG_DCTRAM_dctram315_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram315 :: DATA [11:00] */
#define BG_DCTRAM_dctram315_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram315_DATA_ALIGN                             0
#define BG_DCTRAM_dctram315_DATA_BITS                              12
#define BG_DCTRAM_dctram315_DATA_SHIFT                             0

/***************************************************************************
 *dctram316 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram316 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram316_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram316_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram316_reserved0_BITS                         20
#define BG_DCTRAM_dctram316_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram316 :: DATA [11:00] */
#define BG_DCTRAM_dctram316_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram316_DATA_ALIGN                             0
#define BG_DCTRAM_dctram316_DATA_BITS                              12
#define BG_DCTRAM_dctram316_DATA_SHIFT                             0

/***************************************************************************
 *dctram317 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram317 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram317_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram317_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram317_reserved0_BITS                         20
#define BG_DCTRAM_dctram317_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram317 :: DATA [11:00] */
#define BG_DCTRAM_dctram317_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram317_DATA_ALIGN                             0
#define BG_DCTRAM_dctram317_DATA_BITS                              12
#define BG_DCTRAM_dctram317_DATA_SHIFT                             0

/***************************************************************************
 *dctram318 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram318 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram318_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram318_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram318_reserved0_BITS                         20
#define BG_DCTRAM_dctram318_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram318 :: DATA [11:00] */
#define BG_DCTRAM_dctram318_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram318_DATA_ALIGN                             0
#define BG_DCTRAM_dctram318_DATA_BITS                              12
#define BG_DCTRAM_dctram318_DATA_SHIFT                             0

/***************************************************************************
 *dctram319 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram319 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram319_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram319_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram319_reserved0_BITS                         20
#define BG_DCTRAM_dctram319_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram319 :: DATA [11:00] */
#define BG_DCTRAM_dctram319_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram319_DATA_ALIGN                             0
#define BG_DCTRAM_dctram319_DATA_BITS                              12
#define BG_DCTRAM_dctram319_DATA_SHIFT                             0

/***************************************************************************
 *dctram320 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram320 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram320_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram320_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram320_reserved0_BITS                         20
#define BG_DCTRAM_dctram320_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram320 :: DATA [11:00] */
#define BG_DCTRAM_dctram320_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram320_DATA_ALIGN                             0
#define BG_DCTRAM_dctram320_DATA_BITS                              12
#define BG_DCTRAM_dctram320_DATA_SHIFT                             0

/***************************************************************************
 *dctram321 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram321 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram321_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram321_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram321_reserved0_BITS                         20
#define BG_DCTRAM_dctram321_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram321 :: DATA [11:00] */
#define BG_DCTRAM_dctram321_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram321_DATA_ALIGN                             0
#define BG_DCTRAM_dctram321_DATA_BITS                              12
#define BG_DCTRAM_dctram321_DATA_SHIFT                             0

/***************************************************************************
 *dctram322 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram322 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram322_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram322_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram322_reserved0_BITS                         20
#define BG_DCTRAM_dctram322_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram322 :: DATA [11:00] */
#define BG_DCTRAM_dctram322_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram322_DATA_ALIGN                             0
#define BG_DCTRAM_dctram322_DATA_BITS                              12
#define BG_DCTRAM_dctram322_DATA_SHIFT                             0

/***************************************************************************
 *dctram323 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram323 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram323_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram323_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram323_reserved0_BITS                         20
#define BG_DCTRAM_dctram323_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram323 :: DATA [11:00] */
#define BG_DCTRAM_dctram323_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram323_DATA_ALIGN                             0
#define BG_DCTRAM_dctram323_DATA_BITS                              12
#define BG_DCTRAM_dctram323_DATA_SHIFT                             0

/***************************************************************************
 *dctram324 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram324 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram324_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram324_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram324_reserved0_BITS                         20
#define BG_DCTRAM_dctram324_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram324 :: DATA [11:00] */
#define BG_DCTRAM_dctram324_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram324_DATA_ALIGN                             0
#define BG_DCTRAM_dctram324_DATA_BITS                              12
#define BG_DCTRAM_dctram324_DATA_SHIFT                             0

/***************************************************************************
 *dctram325 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram325 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram325_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram325_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram325_reserved0_BITS                         20
#define BG_DCTRAM_dctram325_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram325 :: DATA [11:00] */
#define BG_DCTRAM_dctram325_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram325_DATA_ALIGN                             0
#define BG_DCTRAM_dctram325_DATA_BITS                              12
#define BG_DCTRAM_dctram325_DATA_SHIFT                             0

/***************************************************************************
 *dctram326 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram326 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram326_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram326_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram326_reserved0_BITS                         20
#define BG_DCTRAM_dctram326_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram326 :: DATA [11:00] */
#define BG_DCTRAM_dctram326_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram326_DATA_ALIGN                             0
#define BG_DCTRAM_dctram326_DATA_BITS                              12
#define BG_DCTRAM_dctram326_DATA_SHIFT                             0

/***************************************************************************
 *dctram327 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram327 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram327_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram327_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram327_reserved0_BITS                         20
#define BG_DCTRAM_dctram327_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram327 :: DATA [11:00] */
#define BG_DCTRAM_dctram327_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram327_DATA_ALIGN                             0
#define BG_DCTRAM_dctram327_DATA_BITS                              12
#define BG_DCTRAM_dctram327_DATA_SHIFT                             0

/***************************************************************************
 *dctram328 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram328 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram328_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram328_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram328_reserved0_BITS                         20
#define BG_DCTRAM_dctram328_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram328 :: DATA [11:00] */
#define BG_DCTRAM_dctram328_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram328_DATA_ALIGN                             0
#define BG_DCTRAM_dctram328_DATA_BITS                              12
#define BG_DCTRAM_dctram328_DATA_SHIFT                             0

/***************************************************************************
 *dctram329 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram329 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram329_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram329_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram329_reserved0_BITS                         20
#define BG_DCTRAM_dctram329_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram329 :: DATA [11:00] */
#define BG_DCTRAM_dctram329_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram329_DATA_ALIGN                             0
#define BG_DCTRAM_dctram329_DATA_BITS                              12
#define BG_DCTRAM_dctram329_DATA_SHIFT                             0

/***************************************************************************
 *dctram330 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram330 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram330_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram330_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram330_reserved0_BITS                         20
#define BG_DCTRAM_dctram330_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram330 :: DATA [11:00] */
#define BG_DCTRAM_dctram330_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram330_DATA_ALIGN                             0
#define BG_DCTRAM_dctram330_DATA_BITS                              12
#define BG_DCTRAM_dctram330_DATA_SHIFT                             0

/***************************************************************************
 *dctram331 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram331 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram331_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram331_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram331_reserved0_BITS                         20
#define BG_DCTRAM_dctram331_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram331 :: DATA [11:00] */
#define BG_DCTRAM_dctram331_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram331_DATA_ALIGN                             0
#define BG_DCTRAM_dctram331_DATA_BITS                              12
#define BG_DCTRAM_dctram331_DATA_SHIFT                             0

/***************************************************************************
 *dctram332 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram332 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram332_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram332_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram332_reserved0_BITS                         20
#define BG_DCTRAM_dctram332_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram332 :: DATA [11:00] */
#define BG_DCTRAM_dctram332_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram332_DATA_ALIGN                             0
#define BG_DCTRAM_dctram332_DATA_BITS                              12
#define BG_DCTRAM_dctram332_DATA_SHIFT                             0

/***************************************************************************
 *dctram333 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram333 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram333_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram333_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram333_reserved0_BITS                         20
#define BG_DCTRAM_dctram333_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram333 :: DATA [11:00] */
#define BG_DCTRAM_dctram333_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram333_DATA_ALIGN                             0
#define BG_DCTRAM_dctram333_DATA_BITS                              12
#define BG_DCTRAM_dctram333_DATA_SHIFT                             0

/***************************************************************************
 *dctram334 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram334 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram334_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram334_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram334_reserved0_BITS                         20
#define BG_DCTRAM_dctram334_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram334 :: DATA [11:00] */
#define BG_DCTRAM_dctram334_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram334_DATA_ALIGN                             0
#define BG_DCTRAM_dctram334_DATA_BITS                              12
#define BG_DCTRAM_dctram334_DATA_SHIFT                             0

/***************************************************************************
 *dctram335 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram335 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram335_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram335_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram335_reserved0_BITS                         20
#define BG_DCTRAM_dctram335_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram335 :: DATA [11:00] */
#define BG_DCTRAM_dctram335_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram335_DATA_ALIGN                             0
#define BG_DCTRAM_dctram335_DATA_BITS                              12
#define BG_DCTRAM_dctram335_DATA_SHIFT                             0

/***************************************************************************
 *dctram336 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram336 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram336_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram336_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram336_reserved0_BITS                         20
#define BG_DCTRAM_dctram336_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram336 :: DATA [11:00] */
#define BG_DCTRAM_dctram336_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram336_DATA_ALIGN                             0
#define BG_DCTRAM_dctram336_DATA_BITS                              12
#define BG_DCTRAM_dctram336_DATA_SHIFT                             0

/***************************************************************************
 *dctram337 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram337 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram337_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram337_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram337_reserved0_BITS                         20
#define BG_DCTRAM_dctram337_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram337 :: DATA [11:00] */
#define BG_DCTRAM_dctram337_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram337_DATA_ALIGN                             0
#define BG_DCTRAM_dctram337_DATA_BITS                              12
#define BG_DCTRAM_dctram337_DATA_SHIFT                             0

/***************************************************************************
 *dctram338 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram338 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram338_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram338_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram338_reserved0_BITS                         20
#define BG_DCTRAM_dctram338_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram338 :: DATA [11:00] */
#define BG_DCTRAM_dctram338_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram338_DATA_ALIGN                             0
#define BG_DCTRAM_dctram338_DATA_BITS                              12
#define BG_DCTRAM_dctram338_DATA_SHIFT                             0

/***************************************************************************
 *dctram339 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram339 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram339_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram339_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram339_reserved0_BITS                         20
#define BG_DCTRAM_dctram339_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram339 :: DATA [11:00] */
#define BG_DCTRAM_dctram339_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram339_DATA_ALIGN                             0
#define BG_DCTRAM_dctram339_DATA_BITS                              12
#define BG_DCTRAM_dctram339_DATA_SHIFT                             0

/***************************************************************************
 *dctram340 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram340 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram340_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram340_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram340_reserved0_BITS                         20
#define BG_DCTRAM_dctram340_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram340 :: DATA [11:00] */
#define BG_DCTRAM_dctram340_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram340_DATA_ALIGN                             0
#define BG_DCTRAM_dctram340_DATA_BITS                              12
#define BG_DCTRAM_dctram340_DATA_SHIFT                             0

/***************************************************************************
 *dctram341 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram341 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram341_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram341_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram341_reserved0_BITS                         20
#define BG_DCTRAM_dctram341_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram341 :: DATA [11:00] */
#define BG_DCTRAM_dctram341_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram341_DATA_ALIGN                             0
#define BG_DCTRAM_dctram341_DATA_BITS                              12
#define BG_DCTRAM_dctram341_DATA_SHIFT                             0

/***************************************************************************
 *dctram342 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram342 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram342_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram342_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram342_reserved0_BITS                         20
#define BG_DCTRAM_dctram342_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram342 :: DATA [11:00] */
#define BG_DCTRAM_dctram342_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram342_DATA_ALIGN                             0
#define BG_DCTRAM_dctram342_DATA_BITS                              12
#define BG_DCTRAM_dctram342_DATA_SHIFT                             0

/***************************************************************************
 *dctram343 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram343 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram343_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram343_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram343_reserved0_BITS                         20
#define BG_DCTRAM_dctram343_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram343 :: DATA [11:00] */
#define BG_DCTRAM_dctram343_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram343_DATA_ALIGN                             0
#define BG_DCTRAM_dctram343_DATA_BITS                              12
#define BG_DCTRAM_dctram343_DATA_SHIFT                             0

/***************************************************************************
 *dctram344 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram344 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram344_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram344_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram344_reserved0_BITS                         20
#define BG_DCTRAM_dctram344_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram344 :: DATA [11:00] */
#define BG_DCTRAM_dctram344_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram344_DATA_ALIGN                             0
#define BG_DCTRAM_dctram344_DATA_BITS                              12
#define BG_DCTRAM_dctram344_DATA_SHIFT                             0

/***************************************************************************
 *dctram345 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram345 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram345_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram345_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram345_reserved0_BITS                         20
#define BG_DCTRAM_dctram345_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram345 :: DATA [11:00] */
#define BG_DCTRAM_dctram345_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram345_DATA_ALIGN                             0
#define BG_DCTRAM_dctram345_DATA_BITS                              12
#define BG_DCTRAM_dctram345_DATA_SHIFT                             0

/***************************************************************************
 *dctram346 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram346 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram346_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram346_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram346_reserved0_BITS                         20
#define BG_DCTRAM_dctram346_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram346 :: DATA [11:00] */
#define BG_DCTRAM_dctram346_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram346_DATA_ALIGN                             0
#define BG_DCTRAM_dctram346_DATA_BITS                              12
#define BG_DCTRAM_dctram346_DATA_SHIFT                             0

/***************************************************************************
 *dctram347 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram347 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram347_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram347_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram347_reserved0_BITS                         20
#define BG_DCTRAM_dctram347_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram347 :: DATA [11:00] */
#define BG_DCTRAM_dctram347_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram347_DATA_ALIGN                             0
#define BG_DCTRAM_dctram347_DATA_BITS                              12
#define BG_DCTRAM_dctram347_DATA_SHIFT                             0

/***************************************************************************
 *dctram348 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram348 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram348_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram348_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram348_reserved0_BITS                         20
#define BG_DCTRAM_dctram348_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram348 :: DATA [11:00] */
#define BG_DCTRAM_dctram348_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram348_DATA_ALIGN                             0
#define BG_DCTRAM_dctram348_DATA_BITS                              12
#define BG_DCTRAM_dctram348_DATA_SHIFT                             0

/***************************************************************************
 *dctram349 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram349 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram349_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram349_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram349_reserved0_BITS                         20
#define BG_DCTRAM_dctram349_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram349 :: DATA [11:00] */
#define BG_DCTRAM_dctram349_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram349_DATA_ALIGN                             0
#define BG_DCTRAM_dctram349_DATA_BITS                              12
#define BG_DCTRAM_dctram349_DATA_SHIFT                             0

/***************************************************************************
 *dctram350 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram350 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram350_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram350_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram350_reserved0_BITS                         20
#define BG_DCTRAM_dctram350_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram350 :: DATA [11:00] */
#define BG_DCTRAM_dctram350_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram350_DATA_ALIGN                             0
#define BG_DCTRAM_dctram350_DATA_BITS                              12
#define BG_DCTRAM_dctram350_DATA_SHIFT                             0

/***************************************************************************
 *dctram351 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram351 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram351_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram351_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram351_reserved0_BITS                         20
#define BG_DCTRAM_dctram351_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram351 :: DATA [11:00] */
#define BG_DCTRAM_dctram351_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram351_DATA_ALIGN                             0
#define BG_DCTRAM_dctram351_DATA_BITS                              12
#define BG_DCTRAM_dctram351_DATA_SHIFT                             0

/***************************************************************************
 *dctram352 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram352 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram352_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram352_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram352_reserved0_BITS                         20
#define BG_DCTRAM_dctram352_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram352 :: DATA [11:00] */
#define BG_DCTRAM_dctram352_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram352_DATA_ALIGN                             0
#define BG_DCTRAM_dctram352_DATA_BITS                              12
#define BG_DCTRAM_dctram352_DATA_SHIFT                             0

/***************************************************************************
 *dctram353 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram353 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram353_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram353_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram353_reserved0_BITS                         20
#define BG_DCTRAM_dctram353_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram353 :: DATA [11:00] */
#define BG_DCTRAM_dctram353_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram353_DATA_ALIGN                             0
#define BG_DCTRAM_dctram353_DATA_BITS                              12
#define BG_DCTRAM_dctram353_DATA_SHIFT                             0

/***************************************************************************
 *dctram354 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram354 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram354_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram354_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram354_reserved0_BITS                         20
#define BG_DCTRAM_dctram354_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram354 :: DATA [11:00] */
#define BG_DCTRAM_dctram354_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram354_DATA_ALIGN                             0
#define BG_DCTRAM_dctram354_DATA_BITS                              12
#define BG_DCTRAM_dctram354_DATA_SHIFT                             0

/***************************************************************************
 *dctram355 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram355 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram355_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram355_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram355_reserved0_BITS                         20
#define BG_DCTRAM_dctram355_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram355 :: DATA [11:00] */
#define BG_DCTRAM_dctram355_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram355_DATA_ALIGN                             0
#define BG_DCTRAM_dctram355_DATA_BITS                              12
#define BG_DCTRAM_dctram355_DATA_SHIFT                             0

/***************************************************************************
 *dctram356 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram356 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram356_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram356_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram356_reserved0_BITS                         20
#define BG_DCTRAM_dctram356_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram356 :: DATA [11:00] */
#define BG_DCTRAM_dctram356_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram356_DATA_ALIGN                             0
#define BG_DCTRAM_dctram356_DATA_BITS                              12
#define BG_DCTRAM_dctram356_DATA_SHIFT                             0

/***************************************************************************
 *dctram357 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram357 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram357_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram357_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram357_reserved0_BITS                         20
#define BG_DCTRAM_dctram357_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram357 :: DATA [11:00] */
#define BG_DCTRAM_dctram357_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram357_DATA_ALIGN                             0
#define BG_DCTRAM_dctram357_DATA_BITS                              12
#define BG_DCTRAM_dctram357_DATA_SHIFT                             0

/***************************************************************************
 *dctram358 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram358 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram358_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram358_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram358_reserved0_BITS                         20
#define BG_DCTRAM_dctram358_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram358 :: DATA [11:00] */
#define BG_DCTRAM_dctram358_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram358_DATA_ALIGN                             0
#define BG_DCTRAM_dctram358_DATA_BITS                              12
#define BG_DCTRAM_dctram358_DATA_SHIFT                             0

/***************************************************************************
 *dctram359 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram359 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram359_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram359_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram359_reserved0_BITS                         20
#define BG_DCTRAM_dctram359_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram359 :: DATA [11:00] */
#define BG_DCTRAM_dctram359_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram359_DATA_ALIGN                             0
#define BG_DCTRAM_dctram359_DATA_BITS                              12
#define BG_DCTRAM_dctram359_DATA_SHIFT                             0

/***************************************************************************
 *dctram360 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram360 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram360_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram360_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram360_reserved0_BITS                         20
#define BG_DCTRAM_dctram360_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram360 :: DATA [11:00] */
#define BG_DCTRAM_dctram360_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram360_DATA_ALIGN                             0
#define BG_DCTRAM_dctram360_DATA_BITS                              12
#define BG_DCTRAM_dctram360_DATA_SHIFT                             0

/***************************************************************************
 *dctram361 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram361 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram361_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram361_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram361_reserved0_BITS                         20
#define BG_DCTRAM_dctram361_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram361 :: DATA [11:00] */
#define BG_DCTRAM_dctram361_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram361_DATA_ALIGN                             0
#define BG_DCTRAM_dctram361_DATA_BITS                              12
#define BG_DCTRAM_dctram361_DATA_SHIFT                             0

/***************************************************************************
 *dctram362 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram362 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram362_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram362_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram362_reserved0_BITS                         20
#define BG_DCTRAM_dctram362_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram362 :: DATA [11:00] */
#define BG_DCTRAM_dctram362_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram362_DATA_ALIGN                             0
#define BG_DCTRAM_dctram362_DATA_BITS                              12
#define BG_DCTRAM_dctram362_DATA_SHIFT                             0

/***************************************************************************
 *dctram363 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram363 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram363_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram363_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram363_reserved0_BITS                         20
#define BG_DCTRAM_dctram363_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram363 :: DATA [11:00] */
#define BG_DCTRAM_dctram363_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram363_DATA_ALIGN                             0
#define BG_DCTRAM_dctram363_DATA_BITS                              12
#define BG_DCTRAM_dctram363_DATA_SHIFT                             0

/***************************************************************************
 *dctram364 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram364 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram364_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram364_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram364_reserved0_BITS                         20
#define BG_DCTRAM_dctram364_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram364 :: DATA [11:00] */
#define BG_DCTRAM_dctram364_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram364_DATA_ALIGN                             0
#define BG_DCTRAM_dctram364_DATA_BITS                              12
#define BG_DCTRAM_dctram364_DATA_SHIFT                             0

/***************************************************************************
 *dctram365 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram365 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram365_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram365_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram365_reserved0_BITS                         20
#define BG_DCTRAM_dctram365_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram365 :: DATA [11:00] */
#define BG_DCTRAM_dctram365_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram365_DATA_ALIGN                             0
#define BG_DCTRAM_dctram365_DATA_BITS                              12
#define BG_DCTRAM_dctram365_DATA_SHIFT                             0

/***************************************************************************
 *dctram366 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram366 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram366_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram366_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram366_reserved0_BITS                         20
#define BG_DCTRAM_dctram366_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram366 :: DATA [11:00] */
#define BG_DCTRAM_dctram366_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram366_DATA_ALIGN                             0
#define BG_DCTRAM_dctram366_DATA_BITS                              12
#define BG_DCTRAM_dctram366_DATA_SHIFT                             0

/***************************************************************************
 *dctram367 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram367 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram367_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram367_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram367_reserved0_BITS                         20
#define BG_DCTRAM_dctram367_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram367 :: DATA [11:00] */
#define BG_DCTRAM_dctram367_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram367_DATA_ALIGN                             0
#define BG_DCTRAM_dctram367_DATA_BITS                              12
#define BG_DCTRAM_dctram367_DATA_SHIFT                             0

/***************************************************************************
 *dctram368 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram368 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram368_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram368_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram368_reserved0_BITS                         20
#define BG_DCTRAM_dctram368_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram368 :: DATA [11:00] */
#define BG_DCTRAM_dctram368_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram368_DATA_ALIGN                             0
#define BG_DCTRAM_dctram368_DATA_BITS                              12
#define BG_DCTRAM_dctram368_DATA_SHIFT                             0

/***************************************************************************
 *dctram369 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram369 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram369_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram369_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram369_reserved0_BITS                         20
#define BG_DCTRAM_dctram369_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram369 :: DATA [11:00] */
#define BG_DCTRAM_dctram369_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram369_DATA_ALIGN                             0
#define BG_DCTRAM_dctram369_DATA_BITS                              12
#define BG_DCTRAM_dctram369_DATA_SHIFT                             0

/***************************************************************************
 *dctram370 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram370 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram370_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram370_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram370_reserved0_BITS                         20
#define BG_DCTRAM_dctram370_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram370 :: DATA [11:00] */
#define BG_DCTRAM_dctram370_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram370_DATA_ALIGN                             0
#define BG_DCTRAM_dctram370_DATA_BITS                              12
#define BG_DCTRAM_dctram370_DATA_SHIFT                             0

/***************************************************************************
 *dctram371 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram371 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram371_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram371_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram371_reserved0_BITS                         20
#define BG_DCTRAM_dctram371_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram371 :: DATA [11:00] */
#define BG_DCTRAM_dctram371_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram371_DATA_ALIGN                             0
#define BG_DCTRAM_dctram371_DATA_BITS                              12
#define BG_DCTRAM_dctram371_DATA_SHIFT                             0

/***************************************************************************
 *dctram372 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram372 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram372_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram372_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram372_reserved0_BITS                         20
#define BG_DCTRAM_dctram372_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram372 :: DATA [11:00] */
#define BG_DCTRAM_dctram372_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram372_DATA_ALIGN                             0
#define BG_DCTRAM_dctram372_DATA_BITS                              12
#define BG_DCTRAM_dctram372_DATA_SHIFT                             0

/***************************************************************************
 *dctram373 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram373 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram373_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram373_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram373_reserved0_BITS                         20
#define BG_DCTRAM_dctram373_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram373 :: DATA [11:00] */
#define BG_DCTRAM_dctram373_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram373_DATA_ALIGN                             0
#define BG_DCTRAM_dctram373_DATA_BITS                              12
#define BG_DCTRAM_dctram373_DATA_SHIFT                             0

/***************************************************************************
 *dctram374 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram374 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram374_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram374_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram374_reserved0_BITS                         20
#define BG_DCTRAM_dctram374_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram374 :: DATA [11:00] */
#define BG_DCTRAM_dctram374_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram374_DATA_ALIGN                             0
#define BG_DCTRAM_dctram374_DATA_BITS                              12
#define BG_DCTRAM_dctram374_DATA_SHIFT                             0

/***************************************************************************
 *dctram375 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram375 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram375_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram375_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram375_reserved0_BITS                         20
#define BG_DCTRAM_dctram375_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram375 :: DATA [11:00] */
#define BG_DCTRAM_dctram375_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram375_DATA_ALIGN                             0
#define BG_DCTRAM_dctram375_DATA_BITS                              12
#define BG_DCTRAM_dctram375_DATA_SHIFT                             0

/***************************************************************************
 *dctram376 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram376 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram376_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram376_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram376_reserved0_BITS                         20
#define BG_DCTRAM_dctram376_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram376 :: DATA [11:00] */
#define BG_DCTRAM_dctram376_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram376_DATA_ALIGN                             0
#define BG_DCTRAM_dctram376_DATA_BITS                              12
#define BG_DCTRAM_dctram376_DATA_SHIFT                             0

/***************************************************************************
 *dctram377 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram377 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram377_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram377_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram377_reserved0_BITS                         20
#define BG_DCTRAM_dctram377_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram377 :: DATA [11:00] */
#define BG_DCTRAM_dctram377_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram377_DATA_ALIGN                             0
#define BG_DCTRAM_dctram377_DATA_BITS                              12
#define BG_DCTRAM_dctram377_DATA_SHIFT                             0

/***************************************************************************
 *dctram378 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram378 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram378_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram378_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram378_reserved0_BITS                         20
#define BG_DCTRAM_dctram378_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram378 :: DATA [11:00] */
#define BG_DCTRAM_dctram378_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram378_DATA_ALIGN                             0
#define BG_DCTRAM_dctram378_DATA_BITS                              12
#define BG_DCTRAM_dctram378_DATA_SHIFT                             0

/***************************************************************************
 *dctram379 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram379 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram379_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram379_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram379_reserved0_BITS                         20
#define BG_DCTRAM_dctram379_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram379 :: DATA [11:00] */
#define BG_DCTRAM_dctram379_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram379_DATA_ALIGN                             0
#define BG_DCTRAM_dctram379_DATA_BITS                              12
#define BG_DCTRAM_dctram379_DATA_SHIFT                             0

/***************************************************************************
 *dctram380 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram380 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram380_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram380_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram380_reserved0_BITS                         20
#define BG_DCTRAM_dctram380_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram380 :: DATA [11:00] */
#define BG_DCTRAM_dctram380_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram380_DATA_ALIGN                             0
#define BG_DCTRAM_dctram380_DATA_BITS                              12
#define BG_DCTRAM_dctram380_DATA_SHIFT                             0

/***************************************************************************
 *dctram381 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram381 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram381_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram381_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram381_reserved0_BITS                         20
#define BG_DCTRAM_dctram381_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram381 :: DATA [11:00] */
#define BG_DCTRAM_dctram381_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram381_DATA_ALIGN                             0
#define BG_DCTRAM_dctram381_DATA_BITS                              12
#define BG_DCTRAM_dctram381_DATA_SHIFT                             0

/***************************************************************************
 *dctram382 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram382 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram382_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram382_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram382_reserved0_BITS                         20
#define BG_DCTRAM_dctram382_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram382 :: DATA [11:00] */
#define BG_DCTRAM_dctram382_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram382_DATA_ALIGN                             0
#define BG_DCTRAM_dctram382_DATA_BITS                              12
#define BG_DCTRAM_dctram382_DATA_SHIFT                             0

/***************************************************************************
 *dctram383 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram383 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram383_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram383_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram383_reserved0_BITS                         20
#define BG_DCTRAM_dctram383_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram383 :: DATA [11:00] */
#define BG_DCTRAM_dctram383_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram383_DATA_ALIGN                             0
#define BG_DCTRAM_dctram383_DATA_BITS                              12
#define BG_DCTRAM_dctram383_DATA_SHIFT                             0

/***************************************************************************
 *dctram384 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram384 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram384_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram384_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram384_reserved0_BITS                         20
#define BG_DCTRAM_dctram384_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram384 :: DATA [11:00] */
#define BG_DCTRAM_dctram384_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram384_DATA_ALIGN                             0
#define BG_DCTRAM_dctram384_DATA_BITS                              12
#define BG_DCTRAM_dctram384_DATA_SHIFT                             0

/***************************************************************************
 *dctram385 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram385 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram385_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram385_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram385_reserved0_BITS                         20
#define BG_DCTRAM_dctram385_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram385 :: DATA [11:00] */
#define BG_DCTRAM_dctram385_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram385_DATA_ALIGN                             0
#define BG_DCTRAM_dctram385_DATA_BITS                              12
#define BG_DCTRAM_dctram385_DATA_SHIFT                             0

/***************************************************************************
 *dctram386 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram386 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram386_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram386_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram386_reserved0_BITS                         20
#define BG_DCTRAM_dctram386_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram386 :: DATA [11:00] */
#define BG_DCTRAM_dctram386_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram386_DATA_ALIGN                             0
#define BG_DCTRAM_dctram386_DATA_BITS                              12
#define BG_DCTRAM_dctram386_DATA_SHIFT                             0

/***************************************************************************
 *dctram387 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram387 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram387_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram387_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram387_reserved0_BITS                         20
#define BG_DCTRAM_dctram387_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram387 :: DATA [11:00] */
#define BG_DCTRAM_dctram387_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram387_DATA_ALIGN                             0
#define BG_DCTRAM_dctram387_DATA_BITS                              12
#define BG_DCTRAM_dctram387_DATA_SHIFT                             0

/***************************************************************************
 *dctram388 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram388 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram388_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram388_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram388_reserved0_BITS                         20
#define BG_DCTRAM_dctram388_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram388 :: DATA [11:00] */
#define BG_DCTRAM_dctram388_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram388_DATA_ALIGN                             0
#define BG_DCTRAM_dctram388_DATA_BITS                              12
#define BG_DCTRAM_dctram388_DATA_SHIFT                             0

/***************************************************************************
 *dctram389 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram389 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram389_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram389_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram389_reserved0_BITS                         20
#define BG_DCTRAM_dctram389_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram389 :: DATA [11:00] */
#define BG_DCTRAM_dctram389_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram389_DATA_ALIGN                             0
#define BG_DCTRAM_dctram389_DATA_BITS                              12
#define BG_DCTRAM_dctram389_DATA_SHIFT                             0

/***************************************************************************
 *dctram390 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram390 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram390_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram390_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram390_reserved0_BITS                         20
#define BG_DCTRAM_dctram390_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram390 :: DATA [11:00] */
#define BG_DCTRAM_dctram390_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram390_DATA_ALIGN                             0
#define BG_DCTRAM_dctram390_DATA_BITS                              12
#define BG_DCTRAM_dctram390_DATA_SHIFT                             0

/***************************************************************************
 *dctram391 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram391 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram391_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram391_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram391_reserved0_BITS                         20
#define BG_DCTRAM_dctram391_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram391 :: DATA [11:00] */
#define BG_DCTRAM_dctram391_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram391_DATA_ALIGN                             0
#define BG_DCTRAM_dctram391_DATA_BITS                              12
#define BG_DCTRAM_dctram391_DATA_SHIFT                             0

/***************************************************************************
 *dctram392 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram392 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram392_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram392_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram392_reserved0_BITS                         20
#define BG_DCTRAM_dctram392_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram392 :: DATA [11:00] */
#define BG_DCTRAM_dctram392_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram392_DATA_ALIGN                             0
#define BG_DCTRAM_dctram392_DATA_BITS                              12
#define BG_DCTRAM_dctram392_DATA_SHIFT                             0

/***************************************************************************
 *dctram393 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram393 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram393_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram393_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram393_reserved0_BITS                         20
#define BG_DCTRAM_dctram393_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram393 :: DATA [11:00] */
#define BG_DCTRAM_dctram393_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram393_DATA_ALIGN                             0
#define BG_DCTRAM_dctram393_DATA_BITS                              12
#define BG_DCTRAM_dctram393_DATA_SHIFT                             0

/***************************************************************************
 *dctram394 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram394 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram394_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram394_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram394_reserved0_BITS                         20
#define BG_DCTRAM_dctram394_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram394 :: DATA [11:00] */
#define BG_DCTRAM_dctram394_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram394_DATA_ALIGN                             0
#define BG_DCTRAM_dctram394_DATA_BITS                              12
#define BG_DCTRAM_dctram394_DATA_SHIFT                             0

/***************************************************************************
 *dctram395 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram395 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram395_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram395_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram395_reserved0_BITS                         20
#define BG_DCTRAM_dctram395_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram395 :: DATA [11:00] */
#define BG_DCTRAM_dctram395_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram395_DATA_ALIGN                             0
#define BG_DCTRAM_dctram395_DATA_BITS                              12
#define BG_DCTRAM_dctram395_DATA_SHIFT                             0

/***************************************************************************
 *dctram396 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram396 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram396_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram396_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram396_reserved0_BITS                         20
#define BG_DCTRAM_dctram396_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram396 :: DATA [11:00] */
#define BG_DCTRAM_dctram396_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram396_DATA_ALIGN                             0
#define BG_DCTRAM_dctram396_DATA_BITS                              12
#define BG_DCTRAM_dctram396_DATA_SHIFT                             0

/***************************************************************************
 *dctram397 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram397 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram397_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram397_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram397_reserved0_BITS                         20
#define BG_DCTRAM_dctram397_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram397 :: DATA [11:00] */
#define BG_DCTRAM_dctram397_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram397_DATA_ALIGN                             0
#define BG_DCTRAM_dctram397_DATA_BITS                              12
#define BG_DCTRAM_dctram397_DATA_SHIFT                             0

/***************************************************************************
 *dctram398 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram398 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram398_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram398_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram398_reserved0_BITS                         20
#define BG_DCTRAM_dctram398_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram398 :: DATA [11:00] */
#define BG_DCTRAM_dctram398_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram398_DATA_ALIGN                             0
#define BG_DCTRAM_dctram398_DATA_BITS                              12
#define BG_DCTRAM_dctram398_DATA_SHIFT                             0

/***************************************************************************
 *dctram399 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram399 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram399_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram399_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram399_reserved0_BITS                         20
#define BG_DCTRAM_dctram399_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram399 :: DATA [11:00] */
#define BG_DCTRAM_dctram399_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram399_DATA_ALIGN                             0
#define BG_DCTRAM_dctram399_DATA_BITS                              12
#define BG_DCTRAM_dctram399_DATA_SHIFT                             0

/***************************************************************************
 *dctram400 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram400 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram400_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram400_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram400_reserved0_BITS                         20
#define BG_DCTRAM_dctram400_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram400 :: DATA [11:00] */
#define BG_DCTRAM_dctram400_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram400_DATA_ALIGN                             0
#define BG_DCTRAM_dctram400_DATA_BITS                              12
#define BG_DCTRAM_dctram400_DATA_SHIFT                             0

/***************************************************************************
 *dctram401 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram401 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram401_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram401_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram401_reserved0_BITS                         20
#define BG_DCTRAM_dctram401_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram401 :: DATA [11:00] */
#define BG_DCTRAM_dctram401_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram401_DATA_ALIGN                             0
#define BG_DCTRAM_dctram401_DATA_BITS                              12
#define BG_DCTRAM_dctram401_DATA_SHIFT                             0

/***************************************************************************
 *dctram402 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram402 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram402_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram402_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram402_reserved0_BITS                         20
#define BG_DCTRAM_dctram402_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram402 :: DATA [11:00] */
#define BG_DCTRAM_dctram402_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram402_DATA_ALIGN                             0
#define BG_DCTRAM_dctram402_DATA_BITS                              12
#define BG_DCTRAM_dctram402_DATA_SHIFT                             0

/***************************************************************************
 *dctram403 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram403 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram403_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram403_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram403_reserved0_BITS                         20
#define BG_DCTRAM_dctram403_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram403 :: DATA [11:00] */
#define BG_DCTRAM_dctram403_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram403_DATA_ALIGN                             0
#define BG_DCTRAM_dctram403_DATA_BITS                              12
#define BG_DCTRAM_dctram403_DATA_SHIFT                             0

/***************************************************************************
 *dctram404 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram404 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram404_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram404_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram404_reserved0_BITS                         20
#define BG_DCTRAM_dctram404_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram404 :: DATA [11:00] */
#define BG_DCTRAM_dctram404_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram404_DATA_ALIGN                             0
#define BG_DCTRAM_dctram404_DATA_BITS                              12
#define BG_DCTRAM_dctram404_DATA_SHIFT                             0

/***************************************************************************
 *dctram405 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram405 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram405_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram405_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram405_reserved0_BITS                         20
#define BG_DCTRAM_dctram405_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram405 :: DATA [11:00] */
#define BG_DCTRAM_dctram405_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram405_DATA_ALIGN                             0
#define BG_DCTRAM_dctram405_DATA_BITS                              12
#define BG_DCTRAM_dctram405_DATA_SHIFT                             0

/***************************************************************************
 *dctram406 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram406 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram406_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram406_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram406_reserved0_BITS                         20
#define BG_DCTRAM_dctram406_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram406 :: DATA [11:00] */
#define BG_DCTRAM_dctram406_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram406_DATA_ALIGN                             0
#define BG_DCTRAM_dctram406_DATA_BITS                              12
#define BG_DCTRAM_dctram406_DATA_SHIFT                             0

/***************************************************************************
 *dctram407 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram407 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram407_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram407_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram407_reserved0_BITS                         20
#define BG_DCTRAM_dctram407_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram407 :: DATA [11:00] */
#define BG_DCTRAM_dctram407_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram407_DATA_ALIGN                             0
#define BG_DCTRAM_dctram407_DATA_BITS                              12
#define BG_DCTRAM_dctram407_DATA_SHIFT                             0

/***************************************************************************
 *dctram408 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram408 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram408_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram408_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram408_reserved0_BITS                         20
#define BG_DCTRAM_dctram408_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram408 :: DATA [11:00] */
#define BG_DCTRAM_dctram408_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram408_DATA_ALIGN                             0
#define BG_DCTRAM_dctram408_DATA_BITS                              12
#define BG_DCTRAM_dctram408_DATA_SHIFT                             0

/***************************************************************************
 *dctram409 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram409 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram409_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram409_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram409_reserved0_BITS                         20
#define BG_DCTRAM_dctram409_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram409 :: DATA [11:00] */
#define BG_DCTRAM_dctram409_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram409_DATA_ALIGN                             0
#define BG_DCTRAM_dctram409_DATA_BITS                              12
#define BG_DCTRAM_dctram409_DATA_SHIFT                             0

/***************************************************************************
 *dctram410 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram410 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram410_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram410_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram410_reserved0_BITS                         20
#define BG_DCTRAM_dctram410_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram410 :: DATA [11:00] */
#define BG_DCTRAM_dctram410_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram410_DATA_ALIGN                             0
#define BG_DCTRAM_dctram410_DATA_BITS                              12
#define BG_DCTRAM_dctram410_DATA_SHIFT                             0

/***************************************************************************
 *dctram411 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram411 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram411_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram411_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram411_reserved0_BITS                         20
#define BG_DCTRAM_dctram411_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram411 :: DATA [11:00] */
#define BG_DCTRAM_dctram411_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram411_DATA_ALIGN                             0
#define BG_DCTRAM_dctram411_DATA_BITS                              12
#define BG_DCTRAM_dctram411_DATA_SHIFT                             0

/***************************************************************************
 *dctram412 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram412 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram412_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram412_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram412_reserved0_BITS                         20
#define BG_DCTRAM_dctram412_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram412 :: DATA [11:00] */
#define BG_DCTRAM_dctram412_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram412_DATA_ALIGN                             0
#define BG_DCTRAM_dctram412_DATA_BITS                              12
#define BG_DCTRAM_dctram412_DATA_SHIFT                             0

/***************************************************************************
 *dctram413 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram413 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram413_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram413_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram413_reserved0_BITS                         20
#define BG_DCTRAM_dctram413_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram413 :: DATA [11:00] */
#define BG_DCTRAM_dctram413_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram413_DATA_ALIGN                             0
#define BG_DCTRAM_dctram413_DATA_BITS                              12
#define BG_DCTRAM_dctram413_DATA_SHIFT                             0

/***************************************************************************
 *dctram414 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram414 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram414_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram414_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram414_reserved0_BITS                         20
#define BG_DCTRAM_dctram414_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram414 :: DATA [11:00] */
#define BG_DCTRAM_dctram414_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram414_DATA_ALIGN                             0
#define BG_DCTRAM_dctram414_DATA_BITS                              12
#define BG_DCTRAM_dctram414_DATA_SHIFT                             0

/***************************************************************************
 *dctram415 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram415 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram415_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram415_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram415_reserved0_BITS                         20
#define BG_DCTRAM_dctram415_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram415 :: DATA [11:00] */
#define BG_DCTRAM_dctram415_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram415_DATA_ALIGN                             0
#define BG_DCTRAM_dctram415_DATA_BITS                              12
#define BG_DCTRAM_dctram415_DATA_SHIFT                             0

/***************************************************************************
 *dctram416 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram416 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram416_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram416_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram416_reserved0_BITS                         20
#define BG_DCTRAM_dctram416_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram416 :: DATA [11:00] */
#define BG_DCTRAM_dctram416_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram416_DATA_ALIGN                             0
#define BG_DCTRAM_dctram416_DATA_BITS                              12
#define BG_DCTRAM_dctram416_DATA_SHIFT                             0

/***************************************************************************
 *dctram417 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram417 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram417_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram417_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram417_reserved0_BITS                         20
#define BG_DCTRAM_dctram417_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram417 :: DATA [11:00] */
#define BG_DCTRAM_dctram417_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram417_DATA_ALIGN                             0
#define BG_DCTRAM_dctram417_DATA_BITS                              12
#define BG_DCTRAM_dctram417_DATA_SHIFT                             0

/***************************************************************************
 *dctram418 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram418 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram418_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram418_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram418_reserved0_BITS                         20
#define BG_DCTRAM_dctram418_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram418 :: DATA [11:00] */
#define BG_DCTRAM_dctram418_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram418_DATA_ALIGN                             0
#define BG_DCTRAM_dctram418_DATA_BITS                              12
#define BG_DCTRAM_dctram418_DATA_SHIFT                             0

/***************************************************************************
 *dctram419 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram419 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram419_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram419_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram419_reserved0_BITS                         20
#define BG_DCTRAM_dctram419_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram419 :: DATA [11:00] */
#define BG_DCTRAM_dctram419_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram419_DATA_ALIGN                             0
#define BG_DCTRAM_dctram419_DATA_BITS                              12
#define BG_DCTRAM_dctram419_DATA_SHIFT                             0

/***************************************************************************
 *dctram420 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram420 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram420_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram420_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram420_reserved0_BITS                         20
#define BG_DCTRAM_dctram420_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram420 :: DATA [11:00] */
#define BG_DCTRAM_dctram420_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram420_DATA_ALIGN                             0
#define BG_DCTRAM_dctram420_DATA_BITS                              12
#define BG_DCTRAM_dctram420_DATA_SHIFT                             0

/***************************************************************************
 *dctram421 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram421 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram421_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram421_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram421_reserved0_BITS                         20
#define BG_DCTRAM_dctram421_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram421 :: DATA [11:00] */
#define BG_DCTRAM_dctram421_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram421_DATA_ALIGN                             0
#define BG_DCTRAM_dctram421_DATA_BITS                              12
#define BG_DCTRAM_dctram421_DATA_SHIFT                             0

/***************************************************************************
 *dctram422 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram422 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram422_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram422_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram422_reserved0_BITS                         20
#define BG_DCTRAM_dctram422_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram422 :: DATA [11:00] */
#define BG_DCTRAM_dctram422_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram422_DATA_ALIGN                             0
#define BG_DCTRAM_dctram422_DATA_BITS                              12
#define BG_DCTRAM_dctram422_DATA_SHIFT                             0

/***************************************************************************
 *dctram423 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram423 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram423_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram423_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram423_reserved0_BITS                         20
#define BG_DCTRAM_dctram423_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram423 :: DATA [11:00] */
#define BG_DCTRAM_dctram423_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram423_DATA_ALIGN                             0
#define BG_DCTRAM_dctram423_DATA_BITS                              12
#define BG_DCTRAM_dctram423_DATA_SHIFT                             0

/***************************************************************************
 *dctram424 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram424 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram424_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram424_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram424_reserved0_BITS                         20
#define BG_DCTRAM_dctram424_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram424 :: DATA [11:00] */
#define BG_DCTRAM_dctram424_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram424_DATA_ALIGN                             0
#define BG_DCTRAM_dctram424_DATA_BITS                              12
#define BG_DCTRAM_dctram424_DATA_SHIFT                             0

/***************************************************************************
 *dctram425 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram425 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram425_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram425_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram425_reserved0_BITS                         20
#define BG_DCTRAM_dctram425_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram425 :: DATA [11:00] */
#define BG_DCTRAM_dctram425_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram425_DATA_ALIGN                             0
#define BG_DCTRAM_dctram425_DATA_BITS                              12
#define BG_DCTRAM_dctram425_DATA_SHIFT                             0

/***************************************************************************
 *dctram426 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram426 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram426_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram426_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram426_reserved0_BITS                         20
#define BG_DCTRAM_dctram426_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram426 :: DATA [11:00] */
#define BG_DCTRAM_dctram426_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram426_DATA_ALIGN                             0
#define BG_DCTRAM_dctram426_DATA_BITS                              12
#define BG_DCTRAM_dctram426_DATA_SHIFT                             0

/***************************************************************************
 *dctram427 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram427 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram427_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram427_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram427_reserved0_BITS                         20
#define BG_DCTRAM_dctram427_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram427 :: DATA [11:00] */
#define BG_DCTRAM_dctram427_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram427_DATA_ALIGN                             0
#define BG_DCTRAM_dctram427_DATA_BITS                              12
#define BG_DCTRAM_dctram427_DATA_SHIFT                             0

/***************************************************************************
 *dctram428 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram428 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram428_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram428_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram428_reserved0_BITS                         20
#define BG_DCTRAM_dctram428_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram428 :: DATA [11:00] */
#define BG_DCTRAM_dctram428_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram428_DATA_ALIGN                             0
#define BG_DCTRAM_dctram428_DATA_BITS                              12
#define BG_DCTRAM_dctram428_DATA_SHIFT                             0

/***************************************************************************
 *dctram429 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram429 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram429_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram429_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram429_reserved0_BITS                         20
#define BG_DCTRAM_dctram429_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram429 :: DATA [11:00] */
#define BG_DCTRAM_dctram429_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram429_DATA_ALIGN                             0
#define BG_DCTRAM_dctram429_DATA_BITS                              12
#define BG_DCTRAM_dctram429_DATA_SHIFT                             0

/***************************************************************************
 *dctram430 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram430 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram430_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram430_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram430_reserved0_BITS                         20
#define BG_DCTRAM_dctram430_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram430 :: DATA [11:00] */
#define BG_DCTRAM_dctram430_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram430_DATA_ALIGN                             0
#define BG_DCTRAM_dctram430_DATA_BITS                              12
#define BG_DCTRAM_dctram430_DATA_SHIFT                             0

/***************************************************************************
 *dctram431 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram431 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram431_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram431_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram431_reserved0_BITS                         20
#define BG_DCTRAM_dctram431_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram431 :: DATA [11:00] */
#define BG_DCTRAM_dctram431_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram431_DATA_ALIGN                             0
#define BG_DCTRAM_dctram431_DATA_BITS                              12
#define BG_DCTRAM_dctram431_DATA_SHIFT                             0

/***************************************************************************
 *dctram432 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram432 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram432_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram432_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram432_reserved0_BITS                         20
#define BG_DCTRAM_dctram432_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram432 :: DATA [11:00] */
#define BG_DCTRAM_dctram432_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram432_DATA_ALIGN                             0
#define BG_DCTRAM_dctram432_DATA_BITS                              12
#define BG_DCTRAM_dctram432_DATA_SHIFT                             0

/***************************************************************************
 *dctram433 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram433 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram433_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram433_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram433_reserved0_BITS                         20
#define BG_DCTRAM_dctram433_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram433 :: DATA [11:00] */
#define BG_DCTRAM_dctram433_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram433_DATA_ALIGN                             0
#define BG_DCTRAM_dctram433_DATA_BITS                              12
#define BG_DCTRAM_dctram433_DATA_SHIFT                             0

/***************************************************************************
 *dctram434 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram434 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram434_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram434_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram434_reserved0_BITS                         20
#define BG_DCTRAM_dctram434_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram434 :: DATA [11:00] */
#define BG_DCTRAM_dctram434_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram434_DATA_ALIGN                             0
#define BG_DCTRAM_dctram434_DATA_BITS                              12
#define BG_DCTRAM_dctram434_DATA_SHIFT                             0

/***************************************************************************
 *dctram435 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram435 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram435_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram435_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram435_reserved0_BITS                         20
#define BG_DCTRAM_dctram435_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram435 :: DATA [11:00] */
#define BG_DCTRAM_dctram435_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram435_DATA_ALIGN                             0
#define BG_DCTRAM_dctram435_DATA_BITS                              12
#define BG_DCTRAM_dctram435_DATA_SHIFT                             0

/***************************************************************************
 *dctram436 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram436 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram436_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram436_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram436_reserved0_BITS                         20
#define BG_DCTRAM_dctram436_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram436 :: DATA [11:00] */
#define BG_DCTRAM_dctram436_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram436_DATA_ALIGN                             0
#define BG_DCTRAM_dctram436_DATA_BITS                              12
#define BG_DCTRAM_dctram436_DATA_SHIFT                             0

/***************************************************************************
 *dctram437 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram437 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram437_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram437_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram437_reserved0_BITS                         20
#define BG_DCTRAM_dctram437_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram437 :: DATA [11:00] */
#define BG_DCTRAM_dctram437_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram437_DATA_ALIGN                             0
#define BG_DCTRAM_dctram437_DATA_BITS                              12
#define BG_DCTRAM_dctram437_DATA_SHIFT                             0

/***************************************************************************
 *dctram438 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram438 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram438_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram438_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram438_reserved0_BITS                         20
#define BG_DCTRAM_dctram438_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram438 :: DATA [11:00] */
#define BG_DCTRAM_dctram438_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram438_DATA_ALIGN                             0
#define BG_DCTRAM_dctram438_DATA_BITS                              12
#define BG_DCTRAM_dctram438_DATA_SHIFT                             0

/***************************************************************************
 *dctram439 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram439 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram439_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram439_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram439_reserved0_BITS                         20
#define BG_DCTRAM_dctram439_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram439 :: DATA [11:00] */
#define BG_DCTRAM_dctram439_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram439_DATA_ALIGN                             0
#define BG_DCTRAM_dctram439_DATA_BITS                              12
#define BG_DCTRAM_dctram439_DATA_SHIFT                             0

/***************************************************************************
 *dctram440 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram440 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram440_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram440_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram440_reserved0_BITS                         20
#define BG_DCTRAM_dctram440_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram440 :: DATA [11:00] */
#define BG_DCTRAM_dctram440_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram440_DATA_ALIGN                             0
#define BG_DCTRAM_dctram440_DATA_BITS                              12
#define BG_DCTRAM_dctram440_DATA_SHIFT                             0

/***************************************************************************
 *dctram441 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram441 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram441_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram441_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram441_reserved0_BITS                         20
#define BG_DCTRAM_dctram441_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram441 :: DATA [11:00] */
#define BG_DCTRAM_dctram441_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram441_DATA_ALIGN                             0
#define BG_DCTRAM_dctram441_DATA_BITS                              12
#define BG_DCTRAM_dctram441_DATA_SHIFT                             0

/***************************************************************************
 *dctram442 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram442 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram442_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram442_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram442_reserved0_BITS                         20
#define BG_DCTRAM_dctram442_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram442 :: DATA [11:00] */
#define BG_DCTRAM_dctram442_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram442_DATA_ALIGN                             0
#define BG_DCTRAM_dctram442_DATA_BITS                              12
#define BG_DCTRAM_dctram442_DATA_SHIFT                             0

/***************************************************************************
 *dctram443 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram443 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram443_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram443_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram443_reserved0_BITS                         20
#define BG_DCTRAM_dctram443_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram443 :: DATA [11:00] */
#define BG_DCTRAM_dctram443_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram443_DATA_ALIGN                             0
#define BG_DCTRAM_dctram443_DATA_BITS                              12
#define BG_DCTRAM_dctram443_DATA_SHIFT                             0

/***************************************************************************
 *dctram444 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram444 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram444_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram444_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram444_reserved0_BITS                         20
#define BG_DCTRAM_dctram444_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram444 :: DATA [11:00] */
#define BG_DCTRAM_dctram444_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram444_DATA_ALIGN                             0
#define BG_DCTRAM_dctram444_DATA_BITS                              12
#define BG_DCTRAM_dctram444_DATA_SHIFT                             0

/***************************************************************************
 *dctram445 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram445 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram445_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram445_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram445_reserved0_BITS                         20
#define BG_DCTRAM_dctram445_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram445 :: DATA [11:00] */
#define BG_DCTRAM_dctram445_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram445_DATA_ALIGN                             0
#define BG_DCTRAM_dctram445_DATA_BITS                              12
#define BG_DCTRAM_dctram445_DATA_SHIFT                             0

/***************************************************************************
 *dctram446 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram446 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram446_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram446_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram446_reserved0_BITS                         20
#define BG_DCTRAM_dctram446_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram446 :: DATA [11:00] */
#define BG_DCTRAM_dctram446_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram446_DATA_ALIGN                             0
#define BG_DCTRAM_dctram446_DATA_BITS                              12
#define BG_DCTRAM_dctram446_DATA_SHIFT                             0

/***************************************************************************
 *dctram447 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram447 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram447_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram447_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram447_reserved0_BITS                         20
#define BG_DCTRAM_dctram447_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram447 :: DATA [11:00] */
#define BG_DCTRAM_dctram447_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram447_DATA_ALIGN                             0
#define BG_DCTRAM_dctram447_DATA_BITS                              12
#define BG_DCTRAM_dctram447_DATA_SHIFT                             0

/***************************************************************************
 *dctram448 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram448 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram448_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram448_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram448_reserved0_BITS                         20
#define BG_DCTRAM_dctram448_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram448 :: DATA [11:00] */
#define BG_DCTRAM_dctram448_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram448_DATA_ALIGN                             0
#define BG_DCTRAM_dctram448_DATA_BITS                              12
#define BG_DCTRAM_dctram448_DATA_SHIFT                             0

/***************************************************************************
 *dctram449 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram449 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram449_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram449_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram449_reserved0_BITS                         20
#define BG_DCTRAM_dctram449_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram449 :: DATA [11:00] */
#define BG_DCTRAM_dctram449_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram449_DATA_ALIGN                             0
#define BG_DCTRAM_dctram449_DATA_BITS                              12
#define BG_DCTRAM_dctram449_DATA_SHIFT                             0

/***************************************************************************
 *dctram450 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram450 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram450_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram450_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram450_reserved0_BITS                         20
#define BG_DCTRAM_dctram450_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram450 :: DATA [11:00] */
#define BG_DCTRAM_dctram450_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram450_DATA_ALIGN                             0
#define BG_DCTRAM_dctram450_DATA_BITS                              12
#define BG_DCTRAM_dctram450_DATA_SHIFT                             0

/***************************************************************************
 *dctram451 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram451 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram451_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram451_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram451_reserved0_BITS                         20
#define BG_DCTRAM_dctram451_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram451 :: DATA [11:00] */
#define BG_DCTRAM_dctram451_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram451_DATA_ALIGN                             0
#define BG_DCTRAM_dctram451_DATA_BITS                              12
#define BG_DCTRAM_dctram451_DATA_SHIFT                             0

/***************************************************************************
 *dctram452 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram452 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram452_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram452_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram452_reserved0_BITS                         20
#define BG_DCTRAM_dctram452_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram452 :: DATA [11:00] */
#define BG_DCTRAM_dctram452_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram452_DATA_ALIGN                             0
#define BG_DCTRAM_dctram452_DATA_BITS                              12
#define BG_DCTRAM_dctram452_DATA_SHIFT                             0

/***************************************************************************
 *dctram453 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram453 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram453_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram453_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram453_reserved0_BITS                         20
#define BG_DCTRAM_dctram453_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram453 :: DATA [11:00] */
#define BG_DCTRAM_dctram453_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram453_DATA_ALIGN                             0
#define BG_DCTRAM_dctram453_DATA_BITS                              12
#define BG_DCTRAM_dctram453_DATA_SHIFT                             0

/***************************************************************************
 *dctram454 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram454 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram454_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram454_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram454_reserved0_BITS                         20
#define BG_DCTRAM_dctram454_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram454 :: DATA [11:00] */
#define BG_DCTRAM_dctram454_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram454_DATA_ALIGN                             0
#define BG_DCTRAM_dctram454_DATA_BITS                              12
#define BG_DCTRAM_dctram454_DATA_SHIFT                             0

/***************************************************************************
 *dctram455 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram455 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram455_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram455_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram455_reserved0_BITS                         20
#define BG_DCTRAM_dctram455_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram455 :: DATA [11:00] */
#define BG_DCTRAM_dctram455_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram455_DATA_ALIGN                             0
#define BG_DCTRAM_dctram455_DATA_BITS                              12
#define BG_DCTRAM_dctram455_DATA_SHIFT                             0

/***************************************************************************
 *dctram456 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram456 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram456_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram456_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram456_reserved0_BITS                         20
#define BG_DCTRAM_dctram456_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram456 :: DATA [11:00] */
#define BG_DCTRAM_dctram456_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram456_DATA_ALIGN                             0
#define BG_DCTRAM_dctram456_DATA_BITS                              12
#define BG_DCTRAM_dctram456_DATA_SHIFT                             0

/***************************************************************************
 *dctram457 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram457 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram457_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram457_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram457_reserved0_BITS                         20
#define BG_DCTRAM_dctram457_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram457 :: DATA [11:00] */
#define BG_DCTRAM_dctram457_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram457_DATA_ALIGN                             0
#define BG_DCTRAM_dctram457_DATA_BITS                              12
#define BG_DCTRAM_dctram457_DATA_SHIFT                             0

/***************************************************************************
 *dctram458 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram458 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram458_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram458_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram458_reserved0_BITS                         20
#define BG_DCTRAM_dctram458_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram458 :: DATA [11:00] */
#define BG_DCTRAM_dctram458_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram458_DATA_ALIGN                             0
#define BG_DCTRAM_dctram458_DATA_BITS                              12
#define BG_DCTRAM_dctram458_DATA_SHIFT                             0

/***************************************************************************
 *dctram459 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram459 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram459_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram459_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram459_reserved0_BITS                         20
#define BG_DCTRAM_dctram459_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram459 :: DATA [11:00] */
#define BG_DCTRAM_dctram459_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram459_DATA_ALIGN                             0
#define BG_DCTRAM_dctram459_DATA_BITS                              12
#define BG_DCTRAM_dctram459_DATA_SHIFT                             0

/***************************************************************************
 *dctram460 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram460 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram460_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram460_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram460_reserved0_BITS                         20
#define BG_DCTRAM_dctram460_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram460 :: DATA [11:00] */
#define BG_DCTRAM_dctram460_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram460_DATA_ALIGN                             0
#define BG_DCTRAM_dctram460_DATA_BITS                              12
#define BG_DCTRAM_dctram460_DATA_SHIFT                             0

/***************************************************************************
 *dctram461 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram461 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram461_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram461_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram461_reserved0_BITS                         20
#define BG_DCTRAM_dctram461_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram461 :: DATA [11:00] */
#define BG_DCTRAM_dctram461_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram461_DATA_ALIGN                             0
#define BG_DCTRAM_dctram461_DATA_BITS                              12
#define BG_DCTRAM_dctram461_DATA_SHIFT                             0

/***************************************************************************
 *dctram462 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram462 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram462_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram462_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram462_reserved0_BITS                         20
#define BG_DCTRAM_dctram462_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram462 :: DATA [11:00] */
#define BG_DCTRAM_dctram462_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram462_DATA_ALIGN                             0
#define BG_DCTRAM_dctram462_DATA_BITS                              12
#define BG_DCTRAM_dctram462_DATA_SHIFT                             0

/***************************************************************************
 *dctram463 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram463 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram463_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram463_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram463_reserved0_BITS                         20
#define BG_DCTRAM_dctram463_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram463 :: DATA [11:00] */
#define BG_DCTRAM_dctram463_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram463_DATA_ALIGN                             0
#define BG_DCTRAM_dctram463_DATA_BITS                              12
#define BG_DCTRAM_dctram463_DATA_SHIFT                             0

/***************************************************************************
 *dctram464 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram464 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram464_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram464_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram464_reserved0_BITS                         20
#define BG_DCTRAM_dctram464_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram464 :: DATA [11:00] */
#define BG_DCTRAM_dctram464_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram464_DATA_ALIGN                             0
#define BG_DCTRAM_dctram464_DATA_BITS                              12
#define BG_DCTRAM_dctram464_DATA_SHIFT                             0

/***************************************************************************
 *dctram465 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram465 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram465_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram465_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram465_reserved0_BITS                         20
#define BG_DCTRAM_dctram465_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram465 :: DATA [11:00] */
#define BG_DCTRAM_dctram465_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram465_DATA_ALIGN                             0
#define BG_DCTRAM_dctram465_DATA_BITS                              12
#define BG_DCTRAM_dctram465_DATA_SHIFT                             0

/***************************************************************************
 *dctram466 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram466 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram466_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram466_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram466_reserved0_BITS                         20
#define BG_DCTRAM_dctram466_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram466 :: DATA [11:00] */
#define BG_DCTRAM_dctram466_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram466_DATA_ALIGN                             0
#define BG_DCTRAM_dctram466_DATA_BITS                              12
#define BG_DCTRAM_dctram466_DATA_SHIFT                             0

/***************************************************************************
 *dctram467 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram467 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram467_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram467_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram467_reserved0_BITS                         20
#define BG_DCTRAM_dctram467_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram467 :: DATA [11:00] */
#define BG_DCTRAM_dctram467_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram467_DATA_ALIGN                             0
#define BG_DCTRAM_dctram467_DATA_BITS                              12
#define BG_DCTRAM_dctram467_DATA_SHIFT                             0

/***************************************************************************
 *dctram468 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram468 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram468_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram468_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram468_reserved0_BITS                         20
#define BG_DCTRAM_dctram468_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram468 :: DATA [11:00] */
#define BG_DCTRAM_dctram468_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram468_DATA_ALIGN                             0
#define BG_DCTRAM_dctram468_DATA_BITS                              12
#define BG_DCTRAM_dctram468_DATA_SHIFT                             0

/***************************************************************************
 *dctram469 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram469 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram469_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram469_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram469_reserved0_BITS                         20
#define BG_DCTRAM_dctram469_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram469 :: DATA [11:00] */
#define BG_DCTRAM_dctram469_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram469_DATA_ALIGN                             0
#define BG_DCTRAM_dctram469_DATA_BITS                              12
#define BG_DCTRAM_dctram469_DATA_SHIFT                             0

/***************************************************************************
 *dctram470 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram470 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram470_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram470_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram470_reserved0_BITS                         20
#define BG_DCTRAM_dctram470_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram470 :: DATA [11:00] */
#define BG_DCTRAM_dctram470_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram470_DATA_ALIGN                             0
#define BG_DCTRAM_dctram470_DATA_BITS                              12
#define BG_DCTRAM_dctram470_DATA_SHIFT                             0

/***************************************************************************
 *dctram471 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram471 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram471_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram471_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram471_reserved0_BITS                         20
#define BG_DCTRAM_dctram471_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram471 :: DATA [11:00] */
#define BG_DCTRAM_dctram471_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram471_DATA_ALIGN                             0
#define BG_DCTRAM_dctram471_DATA_BITS                              12
#define BG_DCTRAM_dctram471_DATA_SHIFT                             0

/***************************************************************************
 *dctram472 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram472 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram472_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram472_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram472_reserved0_BITS                         20
#define BG_DCTRAM_dctram472_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram472 :: DATA [11:00] */
#define BG_DCTRAM_dctram472_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram472_DATA_ALIGN                             0
#define BG_DCTRAM_dctram472_DATA_BITS                              12
#define BG_DCTRAM_dctram472_DATA_SHIFT                             0

/***************************************************************************
 *dctram473 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram473 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram473_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram473_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram473_reserved0_BITS                         20
#define BG_DCTRAM_dctram473_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram473 :: DATA [11:00] */
#define BG_DCTRAM_dctram473_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram473_DATA_ALIGN                             0
#define BG_DCTRAM_dctram473_DATA_BITS                              12
#define BG_DCTRAM_dctram473_DATA_SHIFT                             0

/***************************************************************************
 *dctram474 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram474 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram474_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram474_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram474_reserved0_BITS                         20
#define BG_DCTRAM_dctram474_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram474 :: DATA [11:00] */
#define BG_DCTRAM_dctram474_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram474_DATA_ALIGN                             0
#define BG_DCTRAM_dctram474_DATA_BITS                              12
#define BG_DCTRAM_dctram474_DATA_SHIFT                             0

/***************************************************************************
 *dctram475 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram475 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram475_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram475_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram475_reserved0_BITS                         20
#define BG_DCTRAM_dctram475_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram475 :: DATA [11:00] */
#define BG_DCTRAM_dctram475_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram475_DATA_ALIGN                             0
#define BG_DCTRAM_dctram475_DATA_BITS                              12
#define BG_DCTRAM_dctram475_DATA_SHIFT                             0

/***************************************************************************
 *dctram476 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram476 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram476_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram476_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram476_reserved0_BITS                         20
#define BG_DCTRAM_dctram476_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram476 :: DATA [11:00] */
#define BG_DCTRAM_dctram476_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram476_DATA_ALIGN                             0
#define BG_DCTRAM_dctram476_DATA_BITS                              12
#define BG_DCTRAM_dctram476_DATA_SHIFT                             0

/***************************************************************************
 *dctram477 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram477 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram477_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram477_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram477_reserved0_BITS                         20
#define BG_DCTRAM_dctram477_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram477 :: DATA [11:00] */
#define BG_DCTRAM_dctram477_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram477_DATA_ALIGN                             0
#define BG_DCTRAM_dctram477_DATA_BITS                              12
#define BG_DCTRAM_dctram477_DATA_SHIFT                             0

/***************************************************************************
 *dctram478 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram478 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram478_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram478_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram478_reserved0_BITS                         20
#define BG_DCTRAM_dctram478_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram478 :: DATA [11:00] */
#define BG_DCTRAM_dctram478_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram478_DATA_ALIGN                             0
#define BG_DCTRAM_dctram478_DATA_BITS                              12
#define BG_DCTRAM_dctram478_DATA_SHIFT                             0

/***************************************************************************
 *dctram479 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram479 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram479_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram479_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram479_reserved0_BITS                         20
#define BG_DCTRAM_dctram479_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram479 :: DATA [11:00] */
#define BG_DCTRAM_dctram479_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram479_DATA_ALIGN                             0
#define BG_DCTRAM_dctram479_DATA_BITS                              12
#define BG_DCTRAM_dctram479_DATA_SHIFT                             0

/***************************************************************************
 *dctram480 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram480 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram480_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram480_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram480_reserved0_BITS                         20
#define BG_DCTRAM_dctram480_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram480 :: DATA [11:00] */
#define BG_DCTRAM_dctram480_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram480_DATA_ALIGN                             0
#define BG_DCTRAM_dctram480_DATA_BITS                              12
#define BG_DCTRAM_dctram480_DATA_SHIFT                             0

/***************************************************************************
 *dctram481 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram481 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram481_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram481_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram481_reserved0_BITS                         20
#define BG_DCTRAM_dctram481_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram481 :: DATA [11:00] */
#define BG_DCTRAM_dctram481_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram481_DATA_ALIGN                             0
#define BG_DCTRAM_dctram481_DATA_BITS                              12
#define BG_DCTRAM_dctram481_DATA_SHIFT                             0

/***************************************************************************
 *dctram482 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram482 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram482_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram482_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram482_reserved0_BITS                         20
#define BG_DCTRAM_dctram482_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram482 :: DATA [11:00] */
#define BG_DCTRAM_dctram482_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram482_DATA_ALIGN                             0
#define BG_DCTRAM_dctram482_DATA_BITS                              12
#define BG_DCTRAM_dctram482_DATA_SHIFT                             0

/***************************************************************************
 *dctram483 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram483 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram483_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram483_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram483_reserved0_BITS                         20
#define BG_DCTRAM_dctram483_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram483 :: DATA [11:00] */
#define BG_DCTRAM_dctram483_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram483_DATA_ALIGN                             0
#define BG_DCTRAM_dctram483_DATA_BITS                              12
#define BG_DCTRAM_dctram483_DATA_SHIFT                             0

/***************************************************************************
 *dctram484 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram484 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram484_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram484_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram484_reserved0_BITS                         20
#define BG_DCTRAM_dctram484_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram484 :: DATA [11:00] */
#define BG_DCTRAM_dctram484_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram484_DATA_ALIGN                             0
#define BG_DCTRAM_dctram484_DATA_BITS                              12
#define BG_DCTRAM_dctram484_DATA_SHIFT                             0

/***************************************************************************
 *dctram485 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram485 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram485_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram485_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram485_reserved0_BITS                         20
#define BG_DCTRAM_dctram485_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram485 :: DATA [11:00] */
#define BG_DCTRAM_dctram485_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram485_DATA_ALIGN                             0
#define BG_DCTRAM_dctram485_DATA_BITS                              12
#define BG_DCTRAM_dctram485_DATA_SHIFT                             0

/***************************************************************************
 *dctram486 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram486 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram486_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram486_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram486_reserved0_BITS                         20
#define BG_DCTRAM_dctram486_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram486 :: DATA [11:00] */
#define BG_DCTRAM_dctram486_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram486_DATA_ALIGN                             0
#define BG_DCTRAM_dctram486_DATA_BITS                              12
#define BG_DCTRAM_dctram486_DATA_SHIFT                             0

/***************************************************************************
 *dctram487 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram487 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram487_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram487_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram487_reserved0_BITS                         20
#define BG_DCTRAM_dctram487_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram487 :: DATA [11:00] */
#define BG_DCTRAM_dctram487_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram487_DATA_ALIGN                             0
#define BG_DCTRAM_dctram487_DATA_BITS                              12
#define BG_DCTRAM_dctram487_DATA_SHIFT                             0

/***************************************************************************
 *dctram488 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram488 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram488_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram488_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram488_reserved0_BITS                         20
#define BG_DCTRAM_dctram488_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram488 :: DATA [11:00] */
#define BG_DCTRAM_dctram488_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram488_DATA_ALIGN                             0
#define BG_DCTRAM_dctram488_DATA_BITS                              12
#define BG_DCTRAM_dctram488_DATA_SHIFT                             0

/***************************************************************************
 *dctram489 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram489 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram489_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram489_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram489_reserved0_BITS                         20
#define BG_DCTRAM_dctram489_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram489 :: DATA [11:00] */
#define BG_DCTRAM_dctram489_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram489_DATA_ALIGN                             0
#define BG_DCTRAM_dctram489_DATA_BITS                              12
#define BG_DCTRAM_dctram489_DATA_SHIFT                             0

/***************************************************************************
 *dctram490 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram490 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram490_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram490_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram490_reserved0_BITS                         20
#define BG_DCTRAM_dctram490_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram490 :: DATA [11:00] */
#define BG_DCTRAM_dctram490_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram490_DATA_ALIGN                             0
#define BG_DCTRAM_dctram490_DATA_BITS                              12
#define BG_DCTRAM_dctram490_DATA_SHIFT                             0

/***************************************************************************
 *dctram491 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram491 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram491_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram491_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram491_reserved0_BITS                         20
#define BG_DCTRAM_dctram491_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram491 :: DATA [11:00] */
#define BG_DCTRAM_dctram491_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram491_DATA_ALIGN                             0
#define BG_DCTRAM_dctram491_DATA_BITS                              12
#define BG_DCTRAM_dctram491_DATA_SHIFT                             0

/***************************************************************************
 *dctram492 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram492 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram492_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram492_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram492_reserved0_BITS                         20
#define BG_DCTRAM_dctram492_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram492 :: DATA [11:00] */
#define BG_DCTRAM_dctram492_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram492_DATA_ALIGN                             0
#define BG_DCTRAM_dctram492_DATA_BITS                              12
#define BG_DCTRAM_dctram492_DATA_SHIFT                             0

/***************************************************************************
 *dctram493 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram493 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram493_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram493_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram493_reserved0_BITS                         20
#define BG_DCTRAM_dctram493_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram493 :: DATA [11:00] */
#define BG_DCTRAM_dctram493_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram493_DATA_ALIGN                             0
#define BG_DCTRAM_dctram493_DATA_BITS                              12
#define BG_DCTRAM_dctram493_DATA_SHIFT                             0

/***************************************************************************
 *dctram494 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram494 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram494_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram494_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram494_reserved0_BITS                         20
#define BG_DCTRAM_dctram494_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram494 :: DATA [11:00] */
#define BG_DCTRAM_dctram494_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram494_DATA_ALIGN                             0
#define BG_DCTRAM_dctram494_DATA_BITS                              12
#define BG_DCTRAM_dctram494_DATA_SHIFT                             0

/***************************************************************************
 *dctram495 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram495 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram495_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram495_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram495_reserved0_BITS                         20
#define BG_DCTRAM_dctram495_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram495 :: DATA [11:00] */
#define BG_DCTRAM_dctram495_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram495_DATA_ALIGN                             0
#define BG_DCTRAM_dctram495_DATA_BITS                              12
#define BG_DCTRAM_dctram495_DATA_SHIFT                             0

/***************************************************************************
 *dctram496 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram496 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram496_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram496_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram496_reserved0_BITS                         20
#define BG_DCTRAM_dctram496_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram496 :: DATA [11:00] */
#define BG_DCTRAM_dctram496_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram496_DATA_ALIGN                             0
#define BG_DCTRAM_dctram496_DATA_BITS                              12
#define BG_DCTRAM_dctram496_DATA_SHIFT                             0

/***************************************************************************
 *dctram497 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram497 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram497_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram497_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram497_reserved0_BITS                         20
#define BG_DCTRAM_dctram497_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram497 :: DATA [11:00] */
#define BG_DCTRAM_dctram497_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram497_DATA_ALIGN                             0
#define BG_DCTRAM_dctram497_DATA_BITS                              12
#define BG_DCTRAM_dctram497_DATA_SHIFT                             0

/***************************************************************************
 *dctram498 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram498 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram498_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram498_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram498_reserved0_BITS                         20
#define BG_DCTRAM_dctram498_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram498 :: DATA [11:00] */
#define BG_DCTRAM_dctram498_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram498_DATA_ALIGN                             0
#define BG_DCTRAM_dctram498_DATA_BITS                              12
#define BG_DCTRAM_dctram498_DATA_SHIFT                             0

/***************************************************************************
 *dctram499 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram499 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram499_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram499_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram499_reserved0_BITS                         20
#define BG_DCTRAM_dctram499_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram499 :: DATA [11:00] */
#define BG_DCTRAM_dctram499_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram499_DATA_ALIGN                             0
#define BG_DCTRAM_dctram499_DATA_BITS                              12
#define BG_DCTRAM_dctram499_DATA_SHIFT                             0

/***************************************************************************
 *dctram500 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram500 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram500_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram500_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram500_reserved0_BITS                         20
#define BG_DCTRAM_dctram500_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram500 :: DATA [11:00] */
#define BG_DCTRAM_dctram500_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram500_DATA_ALIGN                             0
#define BG_DCTRAM_dctram500_DATA_BITS                              12
#define BG_DCTRAM_dctram500_DATA_SHIFT                             0

/***************************************************************************
 *dctram501 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram501 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram501_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram501_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram501_reserved0_BITS                         20
#define BG_DCTRAM_dctram501_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram501 :: DATA [11:00] */
#define BG_DCTRAM_dctram501_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram501_DATA_ALIGN                             0
#define BG_DCTRAM_dctram501_DATA_BITS                              12
#define BG_DCTRAM_dctram501_DATA_SHIFT                             0

/***************************************************************************
 *dctram502 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram502 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram502_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram502_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram502_reserved0_BITS                         20
#define BG_DCTRAM_dctram502_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram502 :: DATA [11:00] */
#define BG_DCTRAM_dctram502_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram502_DATA_ALIGN                             0
#define BG_DCTRAM_dctram502_DATA_BITS                              12
#define BG_DCTRAM_dctram502_DATA_SHIFT                             0

/***************************************************************************
 *dctram503 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram503 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram503_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram503_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram503_reserved0_BITS                         20
#define BG_DCTRAM_dctram503_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram503 :: DATA [11:00] */
#define BG_DCTRAM_dctram503_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram503_DATA_ALIGN                             0
#define BG_DCTRAM_dctram503_DATA_BITS                              12
#define BG_DCTRAM_dctram503_DATA_SHIFT                             0

/***************************************************************************
 *dctram504 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram504 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram504_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram504_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram504_reserved0_BITS                         20
#define BG_DCTRAM_dctram504_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram504 :: DATA [11:00] */
#define BG_DCTRAM_dctram504_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram504_DATA_ALIGN                             0
#define BG_DCTRAM_dctram504_DATA_BITS                              12
#define BG_DCTRAM_dctram504_DATA_SHIFT                             0

/***************************************************************************
 *dctram505 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram505 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram505_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram505_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram505_reserved0_BITS                         20
#define BG_DCTRAM_dctram505_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram505 :: DATA [11:00] */
#define BG_DCTRAM_dctram505_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram505_DATA_ALIGN                             0
#define BG_DCTRAM_dctram505_DATA_BITS                              12
#define BG_DCTRAM_dctram505_DATA_SHIFT                             0

/***************************************************************************
 *dctram506 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram506 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram506_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram506_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram506_reserved0_BITS                         20
#define BG_DCTRAM_dctram506_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram506 :: DATA [11:00] */
#define BG_DCTRAM_dctram506_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram506_DATA_ALIGN                             0
#define BG_DCTRAM_dctram506_DATA_BITS                              12
#define BG_DCTRAM_dctram506_DATA_SHIFT                             0

/***************************************************************************
 *dctram507 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram507 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram507_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram507_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram507_reserved0_BITS                         20
#define BG_DCTRAM_dctram507_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram507 :: DATA [11:00] */
#define BG_DCTRAM_dctram507_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram507_DATA_ALIGN                             0
#define BG_DCTRAM_dctram507_DATA_BITS                              12
#define BG_DCTRAM_dctram507_DATA_SHIFT                             0

/***************************************************************************
 *dctram508 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram508 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram508_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram508_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram508_reserved0_BITS                         20
#define BG_DCTRAM_dctram508_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram508 :: DATA [11:00] */
#define BG_DCTRAM_dctram508_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram508_DATA_ALIGN                             0
#define BG_DCTRAM_dctram508_DATA_BITS                              12
#define BG_DCTRAM_dctram508_DATA_SHIFT                             0

/***************************************************************************
 *dctram509 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram509 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram509_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram509_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram509_reserved0_BITS                         20
#define BG_DCTRAM_dctram509_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram509 :: DATA [11:00] */
#define BG_DCTRAM_dctram509_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram509_DATA_ALIGN                             0
#define BG_DCTRAM_dctram509_DATA_BITS                              12
#define BG_DCTRAM_dctram509_DATA_SHIFT                             0

/***************************************************************************
 *dctram510 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram510 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram510_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram510_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram510_reserved0_BITS                         20
#define BG_DCTRAM_dctram510_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram510 :: DATA [11:00] */
#define BG_DCTRAM_dctram510_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram510_DATA_ALIGN                             0
#define BG_DCTRAM_dctram510_DATA_BITS                              12
#define BG_DCTRAM_dctram510_DATA_SHIFT                             0

/***************************************************************************
 *dctram511 - DCT Memory
 ***************************************************************************/
/* BG_DCTRAM :: dctram511 :: reserved0 [31:12] */
#define BG_DCTRAM_dctram511_reserved0_MASK                         0xfffff000
#define BG_DCTRAM_dctram511_reserved0_ALIGN                        0
#define BG_DCTRAM_dctram511_reserved0_BITS                         20
#define BG_DCTRAM_dctram511_reserved0_SHIFT                        12

/* BG_DCTRAM :: dctram511 :: DATA [11:00] */
#define BG_DCTRAM_dctram511_DATA_MASK                              0x00000fff
#define BG_DCTRAM_dctram511_DATA_ALIGN                             0
#define BG_DCTRAM_dctram511_DATA_BITS                              12
#define BG_DCTRAM_dctram511_DATA_SHIFT                             0

#endif /* #ifndef BCM7043_A0_BG_DCTRAM_H__ */

/* End of File */
